diff options
| author | Hal Finkel <hfinkel@anl.gov> | 2012-04-01 19:22:40 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-04-01 19:22:40 +0000 |
| commit | 4d989ac93ce608057fb6b13a4068264ab037ecd5 (patch) | |
| tree | 2dad7e6b65936307c353e73de55e3b9187d4cb26 /lib/Target/PowerPC/PPCSchedule.td | |
| parent | 413b2e7539a1e41f8694abb809678ae48d1e6125 (diff) | |
Add instruction itinerary for the PPC64 A2 core.
This adds a full itinerary for IBM's PPC64 A2 embedded core. These
cores form the basis for the CPUs in the new IBM BG/Q supercomputer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153842 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCSchedule.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCSchedule.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCSchedule.td b/lib/Target/PowerPC/PPCSchedule.td index 237870e240..8c0a858905 100644 --- a/lib/Target/PowerPC/PPCSchedule.td +++ b/lib/Target/PowerPC/PPCSchedule.td @@ -108,6 +108,7 @@ include "PPCSchedule440.td" include "PPCScheduleG4.td" include "PPCScheduleG4Plus.td" include "PPCScheduleG5.td" +include "PPCScheduleA2.td" //===----------------------------------------------------------------------===// // Instruction to itinerary class map - When add new opcodes to the supported |