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authorChris Lattner <sabre@nondot.org>2010-01-19 22:42:28 +0000
committerChris Lattner <sabre@nondot.org>2010-01-19 22:42:28 +0000
commitc7b8814bb4f2e6052060d6118d3bc3b66f5c5b0b (patch)
tree8ea6af8d6d1776b8e40c0feed7d63c85f182ae57 /lib/Target/Mips/MipsTargetMachine.cpp
parent67847538148ed956aaa14a07a77902fb991445f2 (diff)
give MCAsmInfo a 'has little endian' bit. This is unfortunate, but
I really want clients of the streamer to be able to say "emit this 64-bit integer" and have it get broken down right by the streamer. I may change this in the future, we'll see how it works out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93934 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsTargetMachine.cpp')
-rw-r--r--lib/Target/Mips/MipsTargetMachine.cpp7
1 files changed, 3 insertions, 4 deletions
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index 4724ff7d34..1168fef66e 100644
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -22,8 +22,8 @@ extern "C" void LLVMInitializeMipsTarget() {
// Register the target.
RegisterTargetMachine<MipsTargetMachine> X(TheMipsTarget);
RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget);
- RegisterAsmInfo<MipsMCAsmInfo> A(TheMipsTarget);
- RegisterAsmInfo<MipsMCAsmInfo> B(TheMipselTarget);
+ RegisterAsmInfo<MipsBEMCAsmInfo> A(TheMipsTarget);
+ RegisterAsmInfo<MipsLEMCAsmInfo> B(TheMipselTarget);
}
// DataLayout --> Big-endian, 32-bit pointer/ABI/alignment
@@ -60,8 +60,7 @@ MipselTargetMachine(const Target &T, const std::string &TT,
// Install an instruction selector pass using
// the ISelDag to gen Mips code.
bool MipsTargetMachine::
-addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel)
-{
+addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) {
PM.add(createMipsISelDag(*this));
return false;
}