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authorDerek Schuff <dschuff@chromium.org>2012-08-17 14:35:45 -0700
committerDerek Schuff <dschuff@chromium.org>2012-08-17 14:35:45 -0700
commitb62e9abf7dd9e39c95327914ce9dfe216386824a (patch)
treec683f0bcbef19f622727251165eaf89a4f806c62 /lib/Target/Mips/MipsTargetMachine.cpp
parent66f65db9406ca9e59d4bfed89436f668d6a84374 (diff)
parentc723eb1aef817d47feec620933ee1ec6005cdd14 (diff)
Merge commit 'c723eb1aef817d47feec620933ee1ec6005cdd14'
This merges r159618 from upstream into master. It goes with clang rev af50aab0c317462129d73ae8000c6394c718598d Conflicts: include/llvm/CodeGen/LexicalScopes.h include/llvm/Target/TargetOptions.h lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMTargetMachine.cpp lib/Target/ARM/ARMTargetObjectFile.cpp lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp lib/Target/Mips/MipsISelDAGToDAG.cpp lib/Target/Mips/MipsInstrFPU.td lib/Target/Mips/MipsMCInstLower.cpp lib/Target/Mips/MipsTargetMachine.cpp lib/Target/TargetMachine.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86RegisterInfo.cpp lib/Target/X86/X86TargetObjectFile.cpp lib/Target/X86/X86TargetObjectFile.h tools/llc/llc.cpp (tools/llc/llc.cpp is from a merged version of r160532 because it was a bit hairy and I didn't want to redo it.)
Diffstat (limited to 'lib/Target/Mips/MipsTargetMachine.cpp')
-rw-r--r--lib/Target/Mips/MipsTargetMachine.cpp12
1 files changed, 9 insertions, 3 deletions
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index 8b67572348..78e80148f2 100644
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -116,7 +116,7 @@ TargetPassConfig *MipsTargetMachine::createPassConfig(PassManagerBase &PM) {
// Install an instruction selector pass using
// the ISelDag to gen Mips code.
bool MipsPassConfig::addInstSelector() {
- PM->add(createMipsISelDag(getMipsTargetMachine()));
+ addPass(createMipsISelDag(getMipsTargetMachine()));
return false;
}
@@ -124,12 +124,18 @@ bool MipsPassConfig::addInstSelector() {
// machine code is emitted. return true if -print-machineinstrs should
// print out the code after the passes.
bool MipsPassConfig::addPreEmitPass() {
- PM->add(createMipsDelaySlotFillerPass(getMipsTargetMachine()));
+ MipsTargetMachine &TM = getMipsTargetMachine();
+ addPass(createMipsDelaySlotFillerPass(TM));
+
+ // NOTE: long branch has not been implemented for mips16.
+ if (TM.getSubtarget<MipsSubtarget>().hasStandardEncoding())
+ addPass(createMipsLongBranchPass(TM));
+
// @LOCALMOD-START
if (getMipsSubtarget().isTargetNaCl()) {
// This pass does all the heavy sfi lifting.
- PM->add(createMipsNaClRewritePass());
+ addPass(createMipsNaClRewritePass());
}
// @LOCALMOD-END