diff options
| author | Jack Carter <jcarter@mips.com> | 2013-01-17 00:28:20 +0000 |
|---|---|---|
| committer | Jack Carter <jcarter@mips.com> | 2013-01-17 00:28:20 +0000 |
| commit | c147b678206db510336ee95c3b55dc9c0ff19595 (patch) | |
| tree | 149a8e0783cd344d4681ba19348a00a07a60e7c2 /lib/Target/Mips/AsmParser/MipsAsmParser.cpp | |
| parent | e06bfe8d90aba9b6adf00ccc20a0144e90938b00 (diff) | |
This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.
The Mips RDHWR (Read Hardware Register) instruction was not
tested for assembler or dissassembler consumption. This patch
adds that functionality.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172685 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/AsmParser/MipsAsmParser.cpp')
| -rw-r--r-- | lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 57338df53c..39a53aeba7 100644 --- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -1045,6 +1045,9 @@ MipsAsmParser::parseCPURegs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { MipsAsmParser::OperandMatchResultTy MipsAsmParser::parseHWRegs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { + if (isMips64()) + return MatchOperand_NoMatch; + // if the first token is not '$' we have error if (Parser.getTok().isNot(AsmToken::Dollar)) return MatchOperand_NoMatch; @@ -1071,6 +1074,9 @@ MipsAsmParser::parseHWRegs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { MipsAsmParser::OperandMatchResultTy MipsAsmParser::parseHW64Regs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { + + if (!isMips64()) + return MatchOperand_NoMatch; //if the first token is not '$' we have error if (Parser.getTok().isNot(AsmToken::Dollar)) return MatchOperand_NoMatch; @@ -1088,7 +1094,7 @@ MipsAsmParser::parseHW64Regs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { MipsOperand *op = MipsOperand::CreateReg(Mips::HWR29_64, S, Parser.getTok().getLoc()); - op->setRegKind(MipsOperand::Kind_HWRegs); + op->setRegKind(MipsOperand::Kind_HW64Regs); Operands.push_back(op); Parser.Lex(); // Eat reg number |