diff options
author | Eric Christopher <echristo@gmail.com> | 2012-11-14 22:09:20 +0000 |
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committer | Eric Christopher <echristo@gmail.com> | 2012-11-14 22:09:20 +0000 |
commit | 06b423452c85f5a78a1b0555b767cf27b36c0752 (patch) | |
tree | b13a40fe82d2f68d333a99fe3ce43d970217caf6 /lib/Target/CellSPU/SPUTargetMachine.cpp | |
parent | ac99eed043e84905bc2fb299ccaf5809e9c0e90f (diff) |
Remove the CellSPU port.
Approved by Chris Lattner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167984 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUTargetMachine.cpp')
-rw-r--r-- | lib/Target/CellSPU/SPUTargetMachine.cpp | 94 |
1 files changed, 0 insertions, 94 deletions
diff --git a/lib/Target/CellSPU/SPUTargetMachine.cpp b/lib/Target/CellSPU/SPUTargetMachine.cpp deleted file mode 100644 index 918316572a..0000000000 --- a/lib/Target/CellSPU/SPUTargetMachine.cpp +++ /dev/null @@ -1,94 +0,0 @@ -//===-- SPUTargetMachine.cpp - Define TargetMachine for Cell SPU ----------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Top-level implementation for the Cell SPU target. -// -//===----------------------------------------------------------------------===// - -#include "SPUTargetMachine.h" -#include "SPU.h" -#include "llvm/PassManager.h" -#include "llvm/CodeGen/SchedulerRegistry.h" -#include "llvm/Support/DynamicLibrary.h" -#include "llvm/Support/TargetRegistry.h" - -using namespace llvm; - -extern "C" void LLVMInitializeCellSPUTarget() { - // Register the target. - RegisterTargetMachine<SPUTargetMachine> X(TheCellSPUTarget); -} - -const std::pair<unsigned, int> * -SPUFrameLowering::getCalleeSaveSpillSlots(unsigned &NumEntries) const { - NumEntries = 1; - return &LR[0]; -} - -SPUTargetMachine::SPUTargetMachine(const Target &T, StringRef TT, - StringRef CPU, StringRef FS, - const TargetOptions &Options, - Reloc::Model RM, CodeModel::Model CM, - CodeGenOpt::Level OL) - : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), - Subtarget(TT, CPU, FS), - DL(Subtarget.getDataLayoutString()), - InstrInfo(*this), - FrameLowering(Subtarget), - TLInfo(*this), - TSInfo(*this), - InstrItins(Subtarget.getInstrItineraryData()), - STTI(&TLInfo), VTTI(&TLInfo) { -} - -//===----------------------------------------------------------------------===// -// Pass Pipeline Configuration -//===----------------------------------------------------------------------===// - -namespace { -/// SPU Code Generator Pass Configuration Options. -class SPUPassConfig : public TargetPassConfig { -public: - SPUPassConfig(SPUTargetMachine *TM, PassManagerBase &PM) - : TargetPassConfig(TM, PM) {} - - SPUTargetMachine &getSPUTargetMachine() const { - return getTM<SPUTargetMachine>(); - } - - virtual bool addInstSelector(); - virtual bool addPreEmitPass(); -}; -} // namespace - -TargetPassConfig *SPUTargetMachine::createPassConfig(PassManagerBase &PM) { - return new SPUPassConfig(this, PM); -} - -bool SPUPassConfig::addInstSelector() { - // Install an instruction selector. - addPass(createSPUISelDag(getSPUTargetMachine())); - return false; -} - -// passes to run just before printing the assembly -bool SPUPassConfig::addPreEmitPass() { - // load the TCE instruction scheduler, if available via - // loaded plugins - typedef llvm::FunctionPass* (*BuilderFunc)(const char*); - BuilderFunc schedulerCreator = - (BuilderFunc)(intptr_t)sys::DynamicLibrary::SearchForAddressOfSymbol( - "createTCESchedulerPass"); - if (schedulerCreator != NULL) - addPass(schedulerCreator("cellspu")); - - //align instructions with nops/lnops for dual issue - addPass(createSPUNopFillerPass(getSPUTargetMachine())); - return true; -} |