diff options
author | Bill Wendling <isanbard@gmail.com> | 2009-04-28 01:04:53 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2009-04-28 01:04:53 +0000 |
commit | c69d56f1154342a57c9bdd4c17a10333e3520127 (patch) | |
tree | 4793b96fe50eeb1b430040579bb4e2c61479942b /lib/Target/Alpha/AlphaTargetMachine.cpp | |
parent | 2e9d5f912a9841d3685ba0241abe1131943fed29 (diff) |
r70270 isn't ready yet. Back this out. Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaTargetMachine.cpp')
-rw-r--r-- | lib/Target/Alpha/AlphaTargetMachine.cpp | 19 |
1 files changed, 8 insertions, 11 deletions
diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp index 7a87612038..cae91d8c4e 100644 --- a/lib/Target/Alpha/AlphaTargetMachine.cpp +++ b/lib/Target/Alpha/AlphaTargetMachine.cpp @@ -76,34 +76,31 @@ AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS) // Pass Pipeline Configuration //===----------------------------------------------------------------------===// -bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM, - unsigned OptLevel) { +bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { PM.add(createAlphaISelDag(*this)); return false; } -bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, - unsigned OptLevel) { +bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) { // Must run branch selection immediately preceding the asm printer PM.add(createAlphaBranchSelectionPass()); return false; } -bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, - unsigned OptLevel, +bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, bool Verbose, raw_ostream &Out) { PM.add(createAlphaLLRPPass(*this)); - PM.add(createAlphaCodePrinterPass(Out, *this, OptLevel, Verbose)); + PM.add(createAlphaCodePrinterPass(Out, *this, Fast, Verbose)); return false; } -bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel, +bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast, bool DumpAsm, MachineCodeEmitter &MCE) { PM.add(createAlphaCodeEmitterPass(*this, MCE)); if (DumpAsm) - PM.add(createAlphaCodePrinterPass(errs(), *this, OptLevel, true)); + PM.add(createAlphaCodePrinterPass(errs(), *this, Fast, true)); return false; } bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, - unsigned OptLevel, bool DumpAsm, + bool Fast, bool DumpAsm, MachineCodeEmitter &MCE) { - return addCodeEmitter(PM, OptLevel, DumpAsm, MCE); + return addCodeEmitter(PM, Fast, DumpAsm, MCE); } |