diff options
| author | Chris Lattner <sabre@nondot.org> | 2010-04-02 20:16:16 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-04-02 20:16:16 +0000 |
| commit | c7f3ace20c325521c68335a1689645b43b06ddf0 (patch) | |
| tree | 901a5d915c2a5d1003a41c1001a637d2621d44f5 /lib/Target/ARM/Thumb2InstrInfo.cpp | |
| parent | de4845c163a5847c82d7ce10ed0c320098bce6e0 (diff) | |
use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100214 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Thumb2InstrInfo.cpp')
| -rw-r--r-- | lib/Target/ARM/Thumb2InstrInfo.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp index 55163f9b82..de46056693 100644 --- a/lib/Target/ARM/Thumb2InstrInfo.cpp +++ b/lib/Target/ARM/Thumb2InstrInfo.cpp @@ -41,7 +41,7 @@ Thumb2InstrInfo::copyRegToReg(MachineBasicBlock &MBB, unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *DestRC, const TargetRegisterClass *SrcRC) const { - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (I != MBB.end()) DL = I->getDebugLoc(); if (DestRC == ARM::GPRRegisterClass && @@ -66,7 +66,7 @@ void Thumb2InstrInfo:: storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC) const { - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (I != MBB.end()) DL = I->getDebugLoc(); if (RC == ARM::GPRRegisterClass || RC == ARM::tGPRRegisterClass) { @@ -90,7 +90,7 @@ void Thumb2InstrInfo:: loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC) const { - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (I != MBB.end()) DL = I->getDebugLoc(); if (RC == ARM::GPRRegisterClass || RC == ARM::tGPRRegisterClass) { |