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| author | Bill Wendling <isanbard@gmail.com> | 2010-11-03 01:49:29 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2010-11-03 01:49:29 +0000 |
| commit | 92b5a2eb1646b3c1173a5ff3c0073f24ed5ee6a4 (patch) | |
| tree | 534c8e3e743a503fd2abdb4a63599fb3e4b979dc /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 394d6298bcf89a75b51c8314a6705f6984e46b49 (diff) | |
The MC code couldn't handle ARM LDR instructions with negative offsets:
vldr.64 d1, [r0, #-32]
The problem was with how the addressing mode 5 encodes the offsets. This change
makes sure that the way offsets are handled in addressing mode 5 is consistent
throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue"
method into an "Imm12" and "addressing mode 5" version. But not to worry! The
majority of the duplicated code has been unified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118144 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions