diff options
| author | Owen Anderson <resistor@mac.com> | 2011-09-07 17:55:19 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-09-07 17:55:19 +0000 |
| commit | 6de3c6f1a926f49cca2fd207ab4eeb6c35e0e068 (patch) | |
| tree | 99f17aa5337fe5488b9c8d7f87ee7b0529e4cbd3 /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | b950585cc5a0d665e9accfe5ce490cd269756f2e (diff) | |
Port more assembler tests over to disassembler tests, and fix a minor logic error that exposed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139240 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index cd0e5e44fd..3b4e1c5aea 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -2786,7 +2786,7 @@ DecodeThumb2BCCInstruction(llvm::MCInst &Inst, unsigned Insn, break; case 0xf3bf8f6: Inst.setOpcode(ARM::t2ISB); - return MCDisassembler::Success; + break; } unsigned imm = fieldFromInstruction32(Insn, 0, 4); |