diff options
| author | Owen Anderson <resistor@mac.com> | 2011-08-09 21:38:14 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-08-09 21:38:14 +0000 |
| commit | 51157d22348fdbd4b7975877d5b58e53a6d5d3a2 (patch) | |
| tree | 8d38a5e0c0a9f0c560b6e6cbc134233ee919726c /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 65e95d950d9a1344f0f59aae47f2b0c3490b6514 (diff) | |
Silence an false-positive warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137154 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 42cd7ba9a6..6087a6164a 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -949,7 +949,7 @@ static bool DecodeSORegMemOperand(llvm::MCInst &Inst, unsigned Val, unsigned imm = fieldFromInstruction32(Val, 7, 5); unsigned U = fieldFromInstruction32(Val, 12, 1); - ARM_AM::ShiftOpc ShOp; + ARM_AM::ShiftOpc ShOp = ARM_AM::lsl; switch (type) { case 0: ShOp = ARM_AM::lsl; |