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authorNAKAMURA Takumi <geek4civic@gmail.com>2010-09-08 04:48:17 +0000
committerNAKAMURA Takumi <geek4civic@gmail.com>2010-09-08 04:48:17 +0000
commit186acea74646c9f3909b1968920bed8c7ab6148b (patch)
tree43214cdf7749608fcb48dd7ce3a3e0434daf3cb2 /lib/Target/ARM/Disassembler/ARMDisassembler.cpp
parenta247685b3013b3dc675d4e83f9c98de6473af1d7 (diff)
ARM/Disassembler: Fix definitions incompatible(unsigned and uint32_t) to Cygwin-1.5, following up to r113255.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113345 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r--lib/Target/ARM/Disassembler/ARMDisassembler.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 14acf80deb..e22028985b 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -298,7 +298,7 @@ static unsigned T2Morph2LoadLiteral(unsigned Opcode) {
/// decodeInstruction(insn) is invoked on the original insn.
///
/// Otherwise, decodeThumbInstruction is called with the original insn.
-static unsigned decodeThumbSideEffect(bool IsThumb2, uint32_t &insn) {
+static unsigned decodeThumbSideEffect(bool IsThumb2, unsigned &insn) {
if (IsThumb2) {
uint16_t op1 = slice(insn, 28, 27);
uint16_t op2 = slice(insn, 26, 20);
@@ -436,7 +436,7 @@ bool ThumbDisassembler::getInstruction(MCInst &MI,
// passed to decodeThumbInstruction(). For 16-bit Thumb instruction, the top
// halfword of insn is 0x00 0x00; otherwise, the first halfword is moved to
// the top half followed by the second halfword.
- uint32_t insn = 0;
+ unsigned insn = 0;
// Possible second halfword.
uint16_t insn1 = 0;