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| author | Nadav Rotem <nadav.rotem@intel.com> | 2011-11-30 10:13:37 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2011-11-30 10:13:37 +0000 |
| commit | 18197d74255ef076d48c6cec7b6f7ce3d987c3fb (patch) | |
| tree | 2c9e11425f4594c125de114e938e317672b0b842 /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | b72039cf52dc1cf8d4393c21d3c6588546e535c3 (diff) | |
X86: PerformOrCombine introduced a vselect node with a wrong order of operands. This bug was introduced when a dedicated blend sdnode was replaced with the vselect node (in 139479).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145488 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions