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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-24 21:08:09 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-24 21:08:09 +0000 |
| commit | aaaecfce70c0aaed9225359fc56c67b59dca768e (patch) | |
| tree | 0306451f1b6a14f517b7b92bf1945dd58b970940 /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 0745b649ed5c362f1c2f7db59254a76041ddef05 (diff) | |
Stop inferring isVariadic from instruction patterns.
Instructions are now only marked as variadic if they use variable_ops in
their ins list.
A variadic SDNode is typically used for call nodes that have the call
arguments as operands.
A variadic MachineInstr can actually encode a variable number of
operands, for example ARM's stm/ldm instructions. A call instruction
does not have to be variadic. The call argument registers are added as
implicit operands.
This change remove the MCID::Variadic flags from most call and return
instructions, allowing us to better verify their operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162599 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions