diff options
| author | Jim Grosbach <grosbach@apple.com> | 2011-11-12 00:31:53 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-11-12 00:31:53 +0000 |
| commit | 742c4bac07e2800275a69259296fba7c3e3f651b (patch) | |
| tree | fd3a710260634f26270bd3c8b797a45039d1fa29 /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | a7de1d67b2c57153732c394172a64d157c80988e (diff) | |
Re-apply 144430, this time with the associated isel and disassmbler bits.
Original commit msg: 'ARM assembly parsing for VST1 two-register encoding.'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144437 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 840f50bdf5..0b9b5d0e6d 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -2267,10 +2267,6 @@ static DecodeStatus DecodeVSTInstruction(llvm::MCInst &Inst, unsigned Insn, // Second input register switch (Inst.getOpcode()) { - case ARM::VST1q8: - case ARM::VST1q16: - case ARM::VST1q32: - case ARM::VST1q64: case ARM::VST1d8T: case ARM::VST1d16T: case ARM::VST1d32T: |