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| author | Jim Grosbach <grosbach@apple.com> | 2011-08-10 23:43:54 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-08-10 23:43:54 +0000 |
| commit | 59999264e6cfc7f5d59c9a92c8cd9baaa53434f4 (patch) | |
| tree | 2b8ea55b35150ed13f4b78fb9189a05d5d36acd2 /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | e15defc56c4a29c59256415db63d49e6b6379415 (diff) | |
ARM LDRT assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137282 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index b6bfece1b5..f8aee86939 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -953,8 +953,8 @@ static bool DecodeAddrMode2IdxInstruction(llvm::MCInst &Inst, unsigned Insn, case ARM::LDR_PRE: case ARM::LDRBT_POST_REG: case ARM::LDRBT_POST_IMM: - case ARM::LDRTr: - case ARM::LDRTi: + case ARM::LDRT_POST_REG: + case ARM::LDRT_POST_IMM: DecodeGPRRegisterClass(Inst, Rn, Address, Decoder); break; default: |