diff options
| author | Owen Anderson <resistor@mac.com> | 2011-09-01 17:47:45 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-09-01 17:47:45 +0000 |
| commit | 7f17b5a483ea358f2b9e3958f16cf34d75d5b4da (patch) | |
| tree | 84df33d55e7c8a99109119e2b3eb2790ec820feb /lib/Target/ARM/AsmParser/ARMAsmParser.cpp | |
| parent | ae779eea27f41d31268931a6508bd0536cfbc724 (diff) | |
t2Bcc is allowed to have a predicate without a preceding IT instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138946 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/AsmParser/ARMAsmParser.cpp')
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index bba09d4674..f71d0f8642 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -3377,7 +3377,8 @@ validateInstruction(MCInst &Inst, // Check for non-'al' condition codes outside of the IT block. } else if (isThumbTwo() && MCID.isPredicable() && Inst.getOperand(MCID.findFirstPredOperandIdx()).getImm() != - ARMCC::AL && Inst.getOpcode() != ARM::tBcc) + ARMCC::AL && Inst.getOpcode() != ARM::tBcc && + Inst.getOpcode() != ARM::t2Bcc) return Error(Loc, "predicated instructions must be in IT block"); switch (Inst.getOpcode()) { |