aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/ARM/ARMTargetMachine.cpp
diff options
context:
space:
mode:
authorDerek Schuff <dschuff@chromium.org>2012-10-01 11:20:30 -0700
committerDerek Schuff <dschuff@chromium.org>2012-10-01 11:20:30 -0700
commitb3423dd295c69f78bd731f1ad65ad90ce3efa36f (patch)
tree0e872df2f0333ed1806d9e0a6906b2f5ebd58512 /lib/Target/ARM/ARMTargetMachine.cpp
parenta27c28b1427dc2082ab2b31efdbb25f9fde31b61 (diff)
parent72f0976c1b91c7ba50dce4d0ad0289dc14d37f81 (diff)
Merge commit '72f0976c1b91c7ba50dce4d0ad0289dc14d37f81'
Conflicts: lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/Mips/MipsISelLowering.cpp lib/Target/Mips/MipsSubtarget.cpp
Diffstat (limited to 'lib/Target/ARM/ARMTargetMachine.cpp')
-rw-r--r--lib/Target/ARM/ARMTargetMachine.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp
index 4675c98f0d..ac5f14c09c 100644
--- a/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/lib/Target/ARM/ARMTargetMachine.cpp
@@ -150,6 +150,11 @@ bool ARMPassConfig::addPreISel() {
bool ARMPassConfig::addInstSelector() {
addPass(createARMISelDag(getARMTargetMachine(), getOptLevel()));
+
+ const ARMSubtarget *Subtarget = &getARMSubtarget();
+ if (Subtarget->isTargetELF() && !Subtarget->isThumb1Only() &&
+ TM->Options.EnableFastISel)
+ addPass(createARMGlobalBaseRegPass());
return false;
}