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| author | Stepan Dyatkovskiy <stpworld@narod.ru> | 2013-04-05 07:34:08 +0000 |
|---|---|---|
| committer | Stepan Dyatkovskiy <stpworld@narod.ru> | 2013-04-05 07:34:08 +0000 |
| commit | 992347f27131a403043a1e2f1bec4da82568df35 (patch) | |
| tree | 557dceb11312689348944f5beff15d1ac8558818 /lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
| parent | 23a29fb6549bfc5d953131158b1d4280bdca14fa (diff) | |
Buildbot fix for r178851: mistake was in wrong TargetRegisterInfo::getRegClass usage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178854 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index 0682459e1c..b7ac5d57c3 100644 --- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -103,7 +103,7 @@ namespace { SmallVector<unsigned, 4> getUnitRegs(unsigned Reg) { SmallVector<unsigned, 4> Res; - const TargetRegisterClass* TRC = TRI->getRegClass(Reg); + const TargetRegisterClass* TRC = TRI->getMinimalPhysRegClass(Reg); if (TRC == &ARM::QPRRegClass) { if (Reg > ARM::Q7) { Res.push_back(TRI->getSubReg(Reg, ARM::dsub_0)); |