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authorJF Bastien <jfb@chromium.org>2013-07-10 16:11:27 -0700
committerJF Bastien <jfb@chromium.org>2013-07-10 16:11:27 -0700
commiteff7428a4cd1ffcbf4800bd0c502262da361c872 (patch)
tree78de6e3c4f7676b2717ed00cfb33f1cb6e7cbf18 /lib/Support/LockFileManager.cpp
parenta7324c581f3f66acfbf98e18dee3d919d85af16d (diff)
Fix ARM LDMIA MI.
The instruction that was generated for paired register stack slot load was wrong. This was fixed by Tim Northover in LLVM 3.3 commit 179977, but his patch does much more and doesn't apply as-is to our tree. I'll therefore punt applying the full patch to when we rebase to 3.3. I encountered the issue while working on atomics (64-bit atomics require paired registers on ARM), and saw the 3.3 fix when I tried upstreaming my fix. BUG= non TEST= ./pnacl/test.sh test-arm R=eliben@chromium.org Review URL: https://codereview.chromium.org/18699004
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