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authorDerek Schuff <dschuff@chromium.org>2013-01-09 16:55:43 -0800
committerDerek Schuff <dschuff@chromium.org>2013-01-11 13:47:37 -0800
commitb770d0e0636a4b5ad61b1ca661caee67576c05fc (patch)
treec486ce032d41f97313c50629bd5b879f53e6ccbf /lib/MC/MCDisassembler/Disassembler.cpp
parentb835840cf112a6178506d834b58aa625f59a8994 (diff)
parent1ad9253c9d34ccbce3e7e4ea5d87c266cbf93410 (diff)
Merge commit '1ad9253c9d34ccbce3e7e4ea5d87c266cbf93410'
deplib features commented out due to removal upstream; will add back as a localmod Conflicts: include/llvm/ADT/Triple.h include/llvm/MC/MCAssembler.h include/llvm/Target/TargetFrameLowering.h lib/CodeGen/AsmPrinter/DwarfDebug.cpp lib/CodeGen/AsmPrinter/DwarfDebug.h lib/CodeGen/BranchFolding.cpp lib/LLVMBuild.txt lib/Linker/LinkArchives.cpp lib/MC/MCAssembler.cpp lib/MC/MCELFStreamer.cpp lib/Makefile lib/Target/ARM/ARMExpandPseudoInsts.cpp lib/Target/ARM/ARMFrameLowering.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMSubtarget.h lib/Target/ARM/ARMTargetObjectFile.cpp lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp lib/Target/Mips/MipsInstrFPU.td lib/Target/Mips/MipsInstrInfo.td lib/Target/X86/X86CodeEmitter.cpp lib/Target/X86/X86Subtarget.h lib/VMCore/Module.cpp test/MC/MachO/ARM/nop-armv4-padding.s tools/Makefile tools/llc/llc.cpp tools/lto/LTOModule.cpp tools/lto/lto.cpp
Diffstat (limited to 'lib/MC/MCDisassembler/Disassembler.cpp')
-rw-r--r--lib/MC/MCDisassembler/Disassembler.cpp34
1 files changed, 23 insertions, 11 deletions
diff --git a/lib/MC/MCDisassembler/Disassembler.cpp b/lib/MC/MCDisassembler/Disassembler.cpp
index 490ca75bc8..ac583ac127 100644
--- a/lib/MC/MCDisassembler/Disassembler.cpp
+++ b/lib/MC/MCDisassembler/Disassembler.cpp
@@ -9,7 +9,6 @@
#include "Disassembler.h"
#include "llvm-c/Disassembler.h"
-
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler.h"
@@ -18,9 +17,9 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MemoryObject.h"
#include "llvm/Support/TargetRegistry.h"
-#include "llvm/Support/ErrorHandling.h"
namespace llvm {
class Target;
@@ -34,29 +33,29 @@ using namespace llvm;
// functions can all be passed as NULL. If successful, this returns a
// disassembler context. If not, it returns NULL.
//
-LLVMDisasmContextRef LLVMCreateDisasm(const char *TripleName, void *DisInfo,
- int TagType, LLVMOpInfoCallback GetOpInfo,
- LLVMSymbolLookupCallback SymbolLookUp) {
+LLVMDisasmContextRef LLVMCreateDisasmCPU(const char *Triple, const char *CPU,
+ void *DisInfo, int TagType,
+ LLVMOpInfoCallback GetOpInfo,
+ LLVMSymbolLookupCallback SymbolLookUp){
// Get the target.
std::string Error;
- const Target *TheTarget = TargetRegistry::lookupTarget(TripleName, Error);
+ const Target *TheTarget = TargetRegistry::lookupTarget(Triple, Error);
assert(TheTarget && "Unable to create target!");
// Get the assembler info needed to setup the MCContext.
- const MCAsmInfo *MAI = TheTarget->createMCAsmInfo(TripleName);
+ const MCAsmInfo *MAI = TheTarget->createMCAsmInfo(Triple);
assert(MAI && "Unable to create target asm info!");
const MCInstrInfo *MII = TheTarget->createMCInstrInfo();
assert(MII && "Unable to create target instruction info!");
- const MCRegisterInfo *MRI = TheTarget->createMCRegInfo(TripleName);
+ const MCRegisterInfo *MRI = TheTarget->createMCRegInfo(Triple);
assert(MRI && "Unable to create target register info!");
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
- std::string CPU;
- const MCSubtargetInfo *STI = TheTarget->createMCSubtargetInfo(TripleName, CPU,
+ const MCSubtargetInfo *STI = TheTarget->createMCSubtargetInfo(Triple, CPU,
FeaturesStr);
assert(STI && "Unable to create subtarget info!");
@@ -75,7 +74,7 @@ LLVMDisasmContextRef LLVMCreateDisasm(const char *TripleName, void *DisInfo,
*MAI, *MII, *MRI, *STI);
assert(IP && "Unable to create instruction printer!");
- LLVMDisasmContext *DC = new LLVMDisasmContext(TripleName, DisInfo, TagType,
+ LLVMDisasmContext *DC = new LLVMDisasmContext(Triple, DisInfo, TagType,
GetOpInfo, SymbolLookUp,
TheTarget, MAI, MRI,
STI, MII, Ctx, DisAsm, IP);
@@ -84,6 +83,13 @@ LLVMDisasmContextRef LLVMCreateDisasm(const char *TripleName, void *DisInfo,
return DC;
}
+LLVMDisasmContextRef LLVMCreateDisasm(const char *Triple, void *DisInfo,
+ int TagType, LLVMOpInfoCallback GetOpInfo,
+ LLVMSymbolLookupCallback SymbolLookUp) {
+ return LLVMCreateDisasmCPU(Triple, "", DisInfo, TagType, GetOpInfo,
+ SymbolLookUp);
+}
+
//
// LLVMDisasmDispose() disposes of the disassembler specified by the context.
//
@@ -183,5 +189,11 @@ int LLVMSetDisasmOptions(LLVMDisasmContextRef DCR, uint64_t Options){
IP->setUseMarkup(1);
Options &= ~LLVMDisassembler_Option_UseMarkup;
}
+ if (Options & LLVMDisassembler_Option_PrintImmHex){
+ LLVMDisasmContext *DC = (LLVMDisasmContext *)DCR;
+ MCInstPrinter *IP = DC->getIP();
+ IP->setPrintImmHex(1);
+ Options &= ~LLVMDisassembler_Option_PrintImmHex;
+ }
return (Options == 0);
}