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authorEvan Cheng <evan.cheng@apple.com>2009-06-22 20:49:32 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-06-22 20:49:32 +0000
commit81909b74231b816e9c3ae589b8e112377be30cd0 (patch)
tree1a3e27162ab15075182231100c097a33ee019ab1 /lib/CodeGen
parentc236a345c754aa27c95a037ad517271ac73d2456 (diff)
Fix another register coalescer crash: forgot to check if the instruction being updated has already been coalesced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73898 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r--lib/CodeGen/SimpleRegisterCoalescing.cpp10
1 files changed, 7 insertions, 3 deletions
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp
index 20348055bd..c2105e617b 100644
--- a/lib/CodeGen/SimpleRegisterCoalescing.cpp
+++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp
@@ -739,6 +739,9 @@ SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg,
// After updating the operand, check if the machine instruction has
// become a copy. If so, update its val# information.
+ if (JoinedCopies.count(UseMI))
+ continue;
+
const TargetInstrDesc &TID = UseMI->getDesc();
unsigned CopySrcReg, CopyDstReg, CopySrcSubIdx, CopyDstSubIdx;
if (TID.getNumDefs() == 1 && TID.getNumOperands() > 2 &&
@@ -749,9 +752,10 @@ SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg,
allocatableRegs_[CopyDstReg])) {
LiveInterval &LI = li_->getInterval(CopyDstReg);
unsigned DefIdx = li_->getDefIndex(li_->getInstructionIndex(UseMI));
- const LiveRange *DLR = LI.getLiveRangeContaining(DefIdx);
- if (DLR->valno->def == DefIdx)
- DLR->valno->copy = UseMI;
+ if (const LiveRange *DLR = LI.getLiveRangeContaining(DefIdx)) {
+ if (DLR->valno->def == DefIdx)
+ DLR->valno->copy = UseMI;
+ }
}
}
}