Allow targets to compute masked bits for intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27357 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 9 insertions, 4 deletions

diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index f1e36be494..9a2c9a19fb 100644
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -619,9 +619,10 @@ bool TargetLowering::SimplifyDemandedBits(SDOperand Op, uint64_t DemandedMask,
   }
   case ISD::ADD:
   case ISD::SUB:
-    // Just use ComputeMaskedBits to compute output bits, there are no
-    // simplifications that can be done here, and sub always demands all input
-    // bits.
+  case ISD::INTRINSIC_WO_CHAIN:
+  case ISD::INTRINSIC_W_CHAIN:
+  case ISD::INTRINSIC_VOID:
+    // Just use ComputeMaskedBits to compute output bits.
     ComputeMaskedBits(Op, DemandedMask, KnownZero, KnownOne, Depth);
     break;
   }
@@ -916,8 +917,12 @@ void TargetLowering::ComputeMaskedBits(SDOperand Op, uint64_t Mask,
   }
   default:
     // Allow the target to implement this method for its nodes.
-    if (Op.getOpcode() >= ISD::BUILTIN_OP_END)
+    if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
+  case ISD::INTRINSIC_WO_CHAIN:
+  case ISD::INTRINSIC_W_CHAIN:
+  case ISD::INTRINSIC_VOID:
       computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne);
+    }
     return;
   }
 }