Remove trailing whitespace to reduce later commit patch noise.

(Note: Eventually, commits like this will be handled via a pre-commit hook that
 does this automagically, as well as expand tabs to spaces and look for 80-col
 violations.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64827 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 92 insertions, 92 deletions

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 60e8f34651..6b78eb9700 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -338,7 +338,7 @@ void FunctionLoweringInfo::set(Function &fn, MachineFunction &mf,
               unsigned SrcFile = DW->RecordSource(CU.getDirectory(),
                                                   CU.getFilename());
               unsigned idx = MF->getOrCreateDebugLocID(SrcFile,
-                                                       SPI->getLine(), 
+                                                       SPI->getLine(),
                                                        SPI->getColumn());
               DL = DebugLoc::get(idx);
             }
@@ -360,7 +360,7 @@ void FunctionLoweringInfo::set(Function &fn, MachineFunction &mf,
                 DL = DebugLoc::get(MF->getOrCreateDebugLocID(SrcFile, Line, 0));
               }
             }
-          
+
             break;
           }
           }
@@ -463,7 +463,7 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc dl,
         // Assemble the trailing non-power-of-2 part.
         unsigned OddParts = NumParts - RoundParts;
         MVT OddVT = MVT::getIntegerVT(OddParts * PartBits);
-        Hi = getCopyFromParts(DAG, dl, 
+        Hi = getCopyFromParts(DAG, dl,
                               Parts+RoundParts, OddParts, PartVT, OddVT);
 
         // Combine the round and odd parts.
@@ -646,7 +646,7 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc dl, SDValue Val,
 
     // The number of parts is a power of 2.  Repeatedly bisect the value using
     // EXTRACT_ELEMENT.
-    Parts[0] = DAG.getNode(ISD::BIT_CONVERT, dl, 
+    Parts[0] = DAG.getNode(ISD::BIT_CONVERT, dl,
                            MVT::getIntegerVT(ValueVT.getSizeInBits()),
                            Val);
     for (unsigned StepSize = NumParts; StepSize > 1; StepSize /= 2) {
@@ -656,17 +656,17 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc dl, SDValue Val,
         SDValue &Part0 = Parts[i];
         SDValue &Part1 = Parts[i+StepSize/2];
 
-        Part1 = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, 
+        Part1 = DAG.getNode(ISD::EXTRACT_ELEMENT, dl,
                             ThisVT, Part0,
                             DAG.getConstant(1, PtrVT));
-        Part0 = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, 
+        Part0 = DAG.getNode(ISD::EXTRACT_ELEMENT, dl,
                             ThisVT, Part0,
                             DAG.getConstant(0, PtrVT));
 
         if (ThisBits == PartBits && ThisVT != PartVT) {
-          Part0 = DAG.getNode(ISD::BIT_CONVERT, dl, 
+          Part0 = DAG.getNode(ISD::BIT_CONVERT, dl,
                                                 PartVT, Part0);
-          Part1 = DAG.getNode(ISD::BIT_CONVERT, dl, 
+          Part1 = DAG.getNode(ISD::BIT_CONVERT, dl,
                                                 PartVT, Part1);
         }
       }
@@ -687,7 +687,7 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc dl, SDValue Val,
         assert(ValueVT.getVectorElementType() == PartVT &&
                ValueVT.getVectorNumElements() == 1 &&
                "Only trivial vector-to-scalar conversions should get here!");
-        Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, 
+        Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
                           PartVT, Val,
                           DAG.getConstant(0, PtrVT));
       }
@@ -713,12 +713,12 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc dl, SDValue Val,
   SmallVector<SDValue, 8> Ops(NumIntermediates);
   for (unsigned i = 0; i != NumIntermediates; ++i)
     if (IntermediateVT.isVector())
-      Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, 
+      Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl,
                            IntermediateVT, Val,
                            DAG.getConstant(i * (NumElements / NumIntermediates),
                                            PtrVT));
     else
-      Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, 
+      Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
                            IntermediateVT, Val,
                            DAG.getConstant(i, PtrVT));
 
@@ -935,7 +935,7 @@ SDValue SelectionDAGLowering::getValue(const Value *V) {
     }
 
     // Create a BUILD_VECTOR node.
-    return NodeMap[V] = DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(), 
+    return NodeMap[V] = DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(),
                                     VT, &Ops[0], Ops.size());
   }
 
@@ -959,7 +959,7 @@ SDValue SelectionDAGLowering::getValue(const Value *V) {
 
 void SelectionDAGLowering::visitRet(ReturnInst &I) {
   if (I.getNumOperands() == 0) {
-    DAG.setRoot(DAG.getNode(ISD::RET, getCurDebugLoc(), 
+    DAG.setRoot(DAG.getNode(ISD::RET, getCurDebugLoc(),
                             MVT::Other, getControlRoot()));
     return;
   }
@@ -1250,7 +1250,7 @@ void SelectionDAGLowering::visitBr(BranchInst &I) {
 
     // If this is not a fall-through branch, emit the branch.
     if (Succ0MBB != NextBlock)
-      DAG.setRoot(DAG.getNode(ISD::BR, getCurDebugLoc(), 
+      DAG.setRoot(DAG.getNode(ISD::BR, getCurDebugLoc(),
                               MVT::Other, getControlRoot(),
                               DAG.getBasicBlock(Succ0MBB)));
     return;
@@ -1344,7 +1344,7 @@ void SelectionDAGLowering::visitSwitchCase(CaseBlock &CB) {
     MVT VT = CmpOp.getValueType();
 
     if (cast<ConstantInt>(CB.CmpLHS)->isMinValue(true)) {
-      Cond = DAG.getSetCC(dl, MVT::i1, CmpOp, DAG.getConstant(High, VT), 
+      Cond = DAG.getSetCC(dl, MVT::i1, CmpOp, DAG.getConstant(High, VT),
                           ISD::SETLE);
     } else {
       SDValue SUB = DAG.getNode(ISD::SUB, dl,
@@ -1401,7 +1401,7 @@ void SelectionDAGLowering::visitJumpTable(JumpTable &JT) {
   SDValue Index = DAG.getCopyFromReg(getControlRoot(), getCurDebugLoc(),
                                      JT.Reg, PTy);
   SDValue Table = DAG.getJumpTable(JT.JTI, PTy);
-  DAG.setRoot(DAG.getNode(ISD::BR_JT, getCurDebugLoc(), 
+  DAG.setRoot(DAG.getNode(ISD::BR_JT, getCurDebugLoc(),
                           MVT::Other, Index.getValue(1),
                           Table, Index));
 }
@@ -1424,10 +1424,10 @@ void SelectionDAGLowering::visitJumpTableHeader(JumpTable &JT,
   // This value may be smaller or larger than the target's pointer type, and
   // therefore require extension or truncating.
   if (VT.bitsGT(TLI.getPointerTy()))
-    SwitchOp = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), 
+    SwitchOp = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(),
                            TLI.getPointerTy(), SUB);
   else
-    SwitchOp = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(), 
+    SwitchOp = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(),
                            TLI.getPointerTy(), SUB);
 
   unsigned JumpTableReg = FuncInfo.MakeReg(TLI.getPointerTy());
@@ -1478,10 +1478,10 @@ void SelectionDAGLowering::visitBitTestHeader(BitTestBlock &B) {
 
   SDValue ShiftOp;
   if (VT.bitsGT(TLI.getPointerTy()))
-    ShiftOp = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), 
+    ShiftOp = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(),
                           TLI.getPointerTy(), SUB);
   else
-    ShiftOp = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(), 
+    ShiftOp = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(),
                           TLI.getPointerTy(), SUB);
 
   B.Reg = FuncInfo.MakeReg(TLI.getPointerTy());
@@ -1518,13 +1518,13 @@ void SelectionDAGLowering::visitBitTestCase(MachineBasicBlock* NextMBB,
   // Make desired shift
   SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), getCurDebugLoc(), Reg,
                                        TLI.getPointerTy());
-  SDValue SwitchVal = DAG.getNode(ISD::SHL, getCurDebugLoc(), 
+  SDValue SwitchVal = DAG.getNode(ISD::SHL, getCurDebugLoc(),
                                   TLI.getPointerTy(),
                                   DAG.getConstant(1, TLI.getPointerTy()),
                                   ShiftOp);
 
   // Emit bit tests and jumps
-  SDValue AndOp = DAG.getNode(ISD::AND, getCurDebugLoc(), 
+  SDValue AndOp = DAG.getNode(ISD::AND, getCurDebugLoc(),
                               TLI.getPointerTy(), SwitchVal,
                               DAG.getConstant(B.Mask, TLI.getPointerTy()));
   SDValue AndCmp = DAG.getSetCC(getCurDebugLoc(),
@@ -1577,7 +1577,7 @@ void SelectionDAGLowering::visitInvoke(InvokeInst &I) {
   CurMBB->addSuccessor(LandingPad);
 
   // Drop into normal successor.
-  DAG.setRoot(DAG.getNode(ISD::BR, getCurDebugLoc(), 
+  DAG.setRoot(DAG.getNode(ISD::BR, getCurDebugLoc(),
                           MVT::Other, getControlRoot(),
                           DAG.getBasicBlock(Return)));
 }
@@ -2144,7 +2144,7 @@ void SelectionDAGLowering::visitSub(User &I) {
         Constant *CNZ = ConstantVector::get(&NZ[0], NZ.size());
         if (CV == CNZ) {
           SDValue Op2 = getValue(I.getOperand(1));
-          setValue(&I, DAG.getNode(ISD::FNEG, getCurDebugLoc(), 
+          setValue(&I, DAG.getNode(ISD::FNEG, getCurDebugLoc(),
                                    Op2.getValueType(), Op2));
           return;
         }
@@ -2155,7 +2155,7 @@ void SelectionDAGLowering::visitSub(User &I) {
     if (ConstantFP *CFP = dyn_cast<ConstantFP>(I.getOperand(0)))
       if (CFP->isExactlyValue(ConstantFP::getNegativeZero(Ty)->getValueAPF())) {
         SDValue Op2 = getValue(I.getOperand(1));
-        setValue(&I, DAG.getNode(ISD::FNEG, getCurDebugLoc(), 
+        setValue(&I, DAG.getNode(ISD::FNEG, getCurDebugLoc(),
                                  Op2.getValueType(), Op2));
         return;
       }
@@ -2168,7 +2168,7 @@ void SelectionDAGLowering::visitBinary(User &I, unsigned OpCode) {
   SDValue Op1 = getValue(I.getOperand(0));
   SDValue Op2 = getValue(I.getOperand(1));
 
-  setValue(&I, DAG.getNode(OpCode, getCurDebugLoc(), 
+  setValue(&I, DAG.getNode(OpCode, getCurDebugLoc(),
                            Op1.getValueType(), Op1, Op2));
 }
 
@@ -2177,14 +2177,14 @@ void SelectionDAGLowering::visitShift(User &I, unsigned Opcode) {
   SDValue Op2 = getValue(I.getOperand(1));
   if (!isa<VectorType>(I.getType())) {
     if (TLI.getPointerTy().bitsLT(Op2.getValueType()))
-      Op2 = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), 
+      Op2 = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(),
                         TLI.getPointerTy(), Op2);
     else if (TLI.getPointerTy().bitsGT(Op2.getValueType()))
-      Op2 = DAG.getNode(ISD::ANY_EXTEND, getCurDebugLoc(), 
+      Op2 = DAG.getNode(ISD::ANY_EXTEND, getCurDebugLoc(),
                         TLI.getPointerTy(), Op2);
   }
 
-  setValue(&I, DAG.getNode(Opcode, getCurDebugLoc(), 
+  setValue(&I, DAG.getNode(Opcode, getCurDebugLoc(),
                            Op1.getValueType(), Op1, Op2));
 }
 
@@ -2221,7 +2221,7 @@ void SelectionDAGLowering::visitVICmp(User &I) {
   SDValue Op1 = getValue(I.getOperand(0));
   SDValue Op2 = getValue(I.getOperand(1));
   ISD::CondCode Opcode = getICmpCondCode(predicate);
-  setValue(&I, DAG.getVSetCC(getCurDebugLoc(), Op1.getValueType(), 
+  setValue(&I, DAG.getVSetCC(getCurDebugLoc(), Op1.getValueType(),
                              Op1, Op2, Opcode));
 }
 
@@ -2250,12 +2250,12 @@ void SelectionDAGLowering::visitSelect(User &I) {
     SDValue FalseVal = getValue(I.getOperand(2));
 
     for (unsigned i = 0; i != NumValues; ++i)
-      Values[i] = DAG.getNode(ISD::SELECT, getCurDebugLoc(), 
+      Values[i] = DAG.getNode(ISD::SELECT, getCurDebugLoc(),
                               TrueVal.getValueType(), Cond,
                               SDValue(TrueVal.getNode(), TrueVal.getResNo() + i),
                               SDValue(FalseVal.getNode(), FalseVal.getResNo() + i));
 
-    setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(), 
+    setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
                              DAG.getVTList(&ValueVTs[0], NumValues),
                              &Values[0], NumValues));
   }
@@ -2289,7 +2289,7 @@ void SelectionDAGLowering::visitFPTrunc(User &I) {
   // FPTrunc is never a no-op cast, no need to check
   SDValue N = getValue(I.getOperand(0));
   MVT DestVT = TLI.getValueType(I.getType());
-  setValue(&I, DAG.getNode(ISD::FP_ROUND, getCurDebugLoc(), 
+  setValue(&I, DAG.getNode(ISD::FP_ROUND, getCurDebugLoc(),
                            DestVT, N, DAG.getIntPtrConstant(0)));
 }
 
@@ -2353,7 +2353,7 @@ void SelectionDAGLowering::visitIntToPtr(User &I) {
     setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), DestVT, N));
   else
     // Note: ZERO_EXTEND can handle cases where the sizes are equal too
-    setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(), 
+    setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(),
                              DestVT, N));
 }
 
@@ -2364,7 +2364,7 @@ void SelectionDAGLowering::visitBitCast(User &I) {
   // BitCast assures us that source and destination are the same size so this
   // is either a BIT_CONVERT or a no-op.
   if (DestVT != N.getValueType())
-    setValue(&I, DAG.getNode(ISD::BIT_CONVERT, getCurDebugLoc(), 
+    setValue(&I, DAG.getNode(ISD::BIT_CONVERT, getCurDebugLoc(),
                              DestVT, N)); // convert types
   else
     setValue(&I, N); // noop cast.
@@ -2373,18 +2373,18 @@ void SelectionDAGLowering::visitBitCast(User &I) {
 void SelectionDAGLowering::visitInsertElement(User &I) {
   SDValue InVec = getValue(I.getOperand(0));
   SDValue InVal = getValue(I.getOperand(1));
-  SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(), 
+  SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(),
                                 TLI.getPointerTy(),
                                 getValue(I.getOperand(2)));
 
-  setValue(&I, DAG.getNode(ISD::INSERT_VECTOR_ELT, getCurDebugLoc(), 
+  setValue(&I, DAG.getNode(ISD::INSERT_VECTOR_ELT, getCurDebugLoc(),
                            TLI.getValueType(I.getType()),
                            InVec, InVal, InIdx));
 }
 
 void SelectionDAGLowering::visitExtractElement(User &I) {
   SDValue InVec = getValue(I.getOperand(0));
-  SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(), 
+  SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(),
                                 TLI.getPointerTy(),
                                 getValue(I.getOperand(1)));
   setValue(&I, DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurDebugLoc(),
@@ -2417,7 +2417,7 @@ void SelectionDAGLowering::visitShuffleVector(User &I) {
   int SrcNumElts = SrcVT.getVectorNumElements();
 
   if (SrcNumElts == MaskNumElts) {
-    setValue(&I, DAG.getNode(ISD::VECTOR_SHUFFLE, getCurDebugLoc(), 
+    setValue(&I, DAG.getNode(ISD::VECTOR_SHUFFLE, getCurDebugLoc(),
                              VT, Src1, Src2, Mask));
     return;
   }
@@ -2431,7 +2431,7 @@ void SelectionDAGLowering::visitShuffleVector(User &I) {
     // lengths match.
     if (SrcNumElts*2 == MaskNumElts && SequentialMask(Mask, 0)) {
       // The shuffle is concatenating two vectors together.
-      setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, getCurDebugLoc(), 
+      setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, getCurDebugLoc(),
                                VT, Src1, Src2));
       return;
     }
@@ -2448,9 +2448,9 @@ void SelectionDAGLowering::visitShuffleVector(User &I) {
       MOps1[i] = UndefVal;
       MOps2[i] = UndefVal;
     }
-    Src1 = DAG.getNode(ISD::CONCAT_VECTORS, getCurDebugLoc(), 
+    Src1 = DAG.getNode(ISD::CONCAT_VECTORS, getCurDebugLoc(),
                        VT, MOps1, NumConcat);
-    Src2 = DAG.getNode(ISD::CONCAT_VECTORS, getCurDebugLoc(), 
+    Src2 = DAG.getNode(ISD::CONCAT_VECTORS, getCurDebugLoc(),
                        VT, MOps2, NumConcat);
 
     delete [] MOps1;
@@ -2470,11 +2470,11 @@ void SelectionDAGLowering::visitShuffleVector(User &I) {
                                               MaskEltVT));
       }
     }
-    Mask = DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(), 
+    Mask = DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(),
                        Mask.getValueType(),
                        &MappedOps[0], MappedOps.size());
 
-    setValue(&I, DAG.getNode(ISD::VECTOR_SHUFFLE, getCurDebugLoc(), 
+    setValue(&I, DAG.getNode(ISD::VECTOR_SHUFFLE, getCurDebugLoc(),
                              VT, Src1, Src2, Mask));
     return;
   }
@@ -2570,10 +2570,10 @@ void SelectionDAGLowering::visitShuffleVector(User &I) {
           }
         }
       }
-      Mask = DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(), 
+      Mask = DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(),
                          Mask.getValueType(),
                          &MappedOps[0], MappedOps.size());
-      setValue(&I, DAG.getNode(ISD::VECTOR_SHUFFLE, getCurDebugLoc(), 
+      setValue(&I, DAG.getNode(ISD::VECTOR_SHUFFLE, getCurDebugLoc(),
                                VT, Src1, Src2, Mask));
       return;
     }
@@ -2597,11 +2597,11 @@ void SelectionDAGLowering::visitShuffleVector(User &I) {
                                   EltVT, Src1, DAG.getConstant(Idx, PtrVT)));
       else
         Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurDebugLoc(),
-                                  EltVT, Src2, 
+                                  EltVT, Src2,
                                   DAG.getConstant(Idx - SrcNumElts, PtrVT)));
     }
   }
-  setValue(&I, DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(), 
+  setValue(&I, DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(),
                            VT, &Ops[0], Ops.size()));
 }
 
@@ -2641,7 +2641,7 @@ void SelectionDAGLowering::visitInsertValue(InsertValueInst &I) {
     Values[i] = IntoUndef ? DAG.getUNDEF(AggValueVTs[i]) :
                 SDValue(Agg.getNode(), Agg.getResNo() + i);
 
-  setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(), 
+  setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
                            DAG.getVTList(&AggValueVTs[0], NumAggValues),
                            &Values[0], NumAggValues));
 }
@@ -2669,7 +2669,7 @@ void SelectionDAGLowering::visitExtractValue(ExtractValueInst &I) {
         DAG.getUNDEF(Agg.getNode()->getValueType(Agg.getResNo() + i)) :
         SDValue(Agg.getNode(), Agg.getResNo() + i);
 
-  setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(), 
+  setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
                            DAG.getVTList(&ValValueVTs[0], NumValValues),
                            &Values[0], NumValValues));
 }
@@ -2719,10 +2719,10 @@ void SelectionDAGLowering::visitGetElementPtr(User &I) {
       // If the index is smaller or larger than intptr_t, truncate or extend
       // it.
       if (IdxN.getValueType().bitsLT(N.getValueType()))
-        IdxN = DAG.getNode(ISD::SIGN_EXTEND, getCurDebugLoc(), 
+        IdxN = DAG.getNode(ISD::SIGN_EXTEND, getCurDebugLoc(),
                            N.getValueType(), IdxN);
       else if (IdxN.getValueType().bitsGT(N.getValueType()))
-        IdxN = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), 
+        IdxN = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(),
                            N.getValueType(), IdxN);
 
       // If this is a multiply by a power of two, turn it into a shl
@@ -2730,17 +2730,17 @@ void SelectionDAGLowering::visitGetElementPtr(User &I) {
       if (ElementSize != 1) {
         if (isPowerOf2_64(ElementSize)) {
           unsigned Amt = Log2_64(ElementSize);
-          IdxN = DAG.getNode(ISD::SHL, getCurDebugLoc(), 
+          IdxN = DAG.getNode(ISD::SHL, getCurDebugLoc(),
                              N.getValueType(), IdxN,
                              DAG.getConstant(Amt, TLI.getPointerTy()));
         } else {
           SDValue Scale = DAG.getIntPtrConstant(ElementSize);
-          IdxN = DAG.getNode(ISD::MUL, getCurDebugLoc(), 
+          IdxN = DAG.getNode(ISD::MUL, getCurDebugLoc(),
                              N.getValueType(), IdxN, Scale);
         }
       }
 
-      N = DAG.getNode(ISD::ADD, getCurDebugLoc(), 
+      N = DAG.getNode(ISD::ADD, getCurDebugLoc(),
                       N.getValueType(), N, IdxN);
     }
   }
@@ -2762,10 +2762,10 @@ void SelectionDAGLowering::visitAlloca(AllocaInst &I) {
   SDValue AllocSize = getValue(I.getArraySize());
   MVT IntPtr = TLI.getPointerTy();
   if (IntPtr.bitsLT(AllocSize.getValueType()))
-    AllocSize = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), 
+    AllocSize = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(),
                             IntPtr, AllocSize);
   else if (IntPtr.bitsGT(AllocSize.getValueType()))
-    AllocSize = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(), 
+    AllocSize = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(),
                             IntPtr, AllocSize);
 
   AllocSize = DAG.getNode(ISD::MUL, getCurDebugLoc(), IntPtr, AllocSize,
@@ -2781,18 +2781,18 @@ void SelectionDAGLowering::visitAlloca(AllocaInst &I) {
 
   // Round the size of the allocation up to the stack alignment size
   // by add SA-1 to the size.
-  AllocSize = DAG.getNode(ISD::ADD, getCurDebugLoc(), 
+  AllocSize = DAG.getNode(ISD::ADD, getCurDebugLoc(),
                           AllocSize.getValueType(), AllocSize,
                           DAG.getIntPtrConstant(StackAlign-1));
   // Mask out the low bits for alignment purposes.
-  AllocSize = DAG.getNode(ISD::AND, getCurDebugLoc(), 
+  AllocSize = DAG.getNode(ISD::AND, getCurDebugLoc(),
                           AllocSize.getValueType(), AllocSize,
                           DAG.getIntPtrConstant(~(uint64_t)(StackAlign-1)));
 
   SDValue Ops[] = { getRoot(), AllocSize, DAG.getIntPtrConstant(Align) };
   const MVT *VTs = DAG.getNodeValueTypes(AllocSize.getValueType(),
                                                     MVT::Other);
-  SDValue DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, getCurDebugLoc(), 
+  SDValue DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, getCurDebugLoc(),
                             VTs, 2, Ops, 3);
   setValue(&I, DSA);
   DAG.setRoot(DSA.getValue(1));
@@ -2836,7 +2836,7 @@ void SelectionDAGLowering::visitLoad(LoadInst &I) {
   MVT PtrVT = Ptr.getValueType();
   for (unsigned i = 0; i != NumValues; ++i) {
     SDValue L = DAG.getLoad(ValueVTs[i], getCurDebugLoc(), Root,
-                              DAG.getNode(ISD::ADD, getCurDebugLoc(), 
+                              DAG.getNode(ISD::ADD, getCurDebugLoc(),
                                           PtrVT, Ptr,
                                           DAG.getConstant(Offsets[i], PtrVT)),
                               SV, Offsets[i],
@@ -2846,7 +2846,7 @@ void SelectionDAGLowering::visitLoad(LoadInst &I) {
   }
 
   if (!ConstantMemory) {
-    SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), 
+    SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
                                   MVT::Other,
                                   &Chains[0], NumValues);
     if (isVolatile)
@@ -2855,7 +2855,7 @@ void SelectionDAGLowering::visitLoad(LoadInst &I) {
       PendingLoads.push_back(Chain);
   }
 
-  setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(), 
+  setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
                            DAG.getVTList(&ValueVTs[0], NumValues),
                            &Values[0], NumValues));
 }
@@ -2886,13 +2886,13 @@ void SelectionDAGLowering::visitStore(StoreInst &I) {
   for (unsigned i = 0; i != NumValues; ++i)
     Chains[i] = DAG.getStore(Root, getCurDebugLoc(),
                              SDValue(Src.getNode(), Src.getResNo() + i),
-                             DAG.getNode(ISD::ADD, getCurDebugLoc(), 
+                             DAG.getNode(ISD::ADD, getCurDebugLoc(),
                                          PtrVT, Ptr,
                                          DAG.getConstant(Offsets[i], PtrVT)),
                              PtrV, Offsets[i],
                              isVolatile, Alignment);
 
-  DAG.setRoot(DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), 
+  DAG.setRoot(DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
                           MVT::Other, &Chains[0], NumValues));
 }
 
@@ -2961,15 +2961,15 @@ void SelectionDAGLowering::visitTargetIntrinsic(CallInst &I,
                                      Info.readMem, Info.writeMem);
   }
   else if (!HasChain)
-    Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, getCurDebugLoc(), 
+    Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, getCurDebugLoc(),
                          VTList, VTs.size(),
                          &Ops[0], Ops.size());
   else if (I.getType() != Type::VoidTy)
-    Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, getCurDebugLoc(), 
+    Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, getCurDebugLoc(),
                          VTList, VTs.size(),
                          &Ops[0], Ops.size());
   else
-    Result = DAG.getNode(ISD::INTRINSIC_VOID, getCurDebugLoc(), 
+    Result = DAG.getNode(ISD::INTRINSIC_VOID, getCurDebugLoc(),
                          VTList, VTs.size(),
                          &Ops[0], Ops.size());
 
@@ -3121,7 +3121,7 @@ SelectionDAGLowering::implVisitAluOverflow(CallInst &I, ISD::NodeType Op) {
   MVT ValueVTs[] = { Op1.getValueType(), MVT::i1 };
   SDValue Ops[] = { Op1, Op2 };
 
-  SDValue Result = DAG.getNode(Op, getCurDebugLoc(), 
+  SDValue Result = DAG.getNode(Op, getCurDebugLoc(),
                                DAG.getVTList(&ValueVTs[0], 2), &Ops[0], 2);
 
   setValue(&I, Result);
@@ -3235,7 +3235,7 @@ SelectionDAGLowering::visitExp(CallInst &I) {
       SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X);
       SDValue t13 = DAG.getNode(ISD::FADD, dl, MVT::f32, t12,
                                 getF32Constant(DAG, 0x3f800000));
-      SDValue TwoToFracPartOfX = DAG.getNode(ISD::BIT_CONVERT, dl, 
+      SDValue TwoToFracPartOfX = DAG.getNode(ISD::BIT_CONVERT, dl,
                                              MVT::i32, t13);
 
       // Add the exponent into the result in integer domain.
@@ -3291,7 +3291,7 @@ SelectionDAGLowering::visitLog(CallInst &I) {
       SDValue LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
                                           getF32Constant(DAG, 0x3f949a29));
 
-      result = DAG.getNode(ISD::FADD, dl, 
+      result = DAG.getNode(ISD::FADD, dl,
                            MVT::f32, LogOfExponent, LogOfMantissa);
     } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
       // For floating-point precision of 12:
@@ -3317,7 +3317,7 @@ SelectionDAGLowering::visitLog(CallInst &I) {
       SDValue LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
                                           getF32Constant(DAG, 0x3fdef31a));
 
-      result = DAG.getNode(ISD::FADD, dl, 
+      result = DAG.getNode(ISD::FADD, dl,
                            MVT::f32, LogOfExponent, LogOfMantissa);
     } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
       // For floating-point precision of 18:
@@ -3351,7 +3351,7 @@ SelectionDAGLowering::visitLog(CallInst &I) {
       SDValue LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t10,
                                           getF32Constant(DAG, 0x4006dcab));
 
-      result = DAG.getNode(ISD::FADD, dl, 
+      result = DAG.getNode(ISD::FADD, dl,
                            MVT::f32, LogOfExponent, LogOfMantissa);
     }
   } else {
@@ -3399,7 +3399,7 @@ SelectionDAGLowering::visitLog2(CallInst &I) {
       SDValue Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
                                            getF32Constant(DAG, 0x3fd6633d));
 
-      result = DAG.getNode(ISD::FADD, dl, 
+      result = DAG.getNode(ISD::FADD, dl,
                            MVT::f32, LogOfExponent, Log2ofMantissa);
     } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
       // For floating-point precision of 12:
@@ -3425,7 +3425,7 @@ SelectionDAGLowering::visitLog2(CallInst &I) {
       SDValue Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
                                            getF32Constant(DAG, 0x4020d29c));
 
-      result = DAG.getNode(ISD::FADD, dl, 
+      result = DAG.getNode(ISD::FADD, dl,
                            MVT::f32, LogOfExponent, Log2ofMantissa);
     } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
       // For floating-point precision of 18:
@@ -3460,7 +3460,7 @@ SelectionDAGLowering::visitLog2(CallInst &I) {
       SDValue Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t10,
                                            getF32Constant(DAG, 0x4042902c));
 
-      result = DAG.getNode(ISD::FADD, dl, 
+      result = DAG.getNode(ISD::FADD, dl,
                            MVT::f32, LogOfExponent, Log2ofMantissa);
     }
   } else {
@@ -3510,7 +3510,7 @@ SelectionDAGLowering::visitLog10(CallInst &I) {
       SDValue Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
                                             getF32Constant(DAG, 0x3f011300));
 
-      result = DAG.getNode(ISD::FADD, dl, 
+      result = DAG.getNode(ISD::FADD, dl,
                            MVT::f32, LogOfExponent, Log10ofMantissa);
     } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
       // For floating-point precision of 12:
@@ -3532,7 +3532,7 @@ SelectionDAGLowering::visitLog10(CallInst &I) {
       SDValue Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t4,
                                             getF32Constant(DAG, 0x3f25f7c3));
 
-      result = DAG.getNode(ISD::FADD, dl, 
+      result = DAG.getNode(ISD::FADD, dl,
                            MVT::f32, LogOfExponent, Log10ofMantissa);
     } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
       // For floating-point precision of 18:
@@ -3562,7 +3562,7 @@ SelectionDAGLowering::visitLog10(CallInst &I) {
       SDValue Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t8,
                                             getF32Constant(DAG, 0x3f57ce70));
 
-      result = DAG.getNode(ISD::FADD, dl, 
+      result = DAG.getNode(ISD::FADD, dl,
                            MVT::f32, LogOfExponent, Log10ofMantissa);
     }
   } else {
@@ -3615,7 +3615,7 @@ SelectionDAGLowering::visitExp2(CallInst &I) {
       SDValue TwoToFractionalPartOfX =
         DAG.getNode(ISD::ADD, dl, MVT::i32, t6, IntegerPartOfX);
 
-      result = DAG.getNode(ISD::BIT_CONVERT, dl, 
+      result = DAG.getNode(ISD::BIT_CONVERT, dl,
                            MVT::f32, TwoToFractionalPartOfX);
     } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
       // For floating-point precision of 12:
@@ -3640,7 +3640,7 @@ SelectionDAGLowering::visitExp2(CallInst &I) {
       SDValue TwoToFractionalPartOfX =
         DAG.getNode(ISD::ADD, dl, MVT::i32, t8, IntegerPartOfX);
 
-      result = DAG.getNode(ISD::BIT_CONVERT, dl, 
+      result = DAG.getNode(ISD::BIT_CONVERT, dl,
                            MVT::f32, TwoToFractionalPartOfX);
     } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
       // For floating-point precision of 18:
@@ -3676,7 +3676,7 @@ SelectionDAGLowering::visitExp2(CallInst &I) {
       SDValue TwoToFractionalPartOfX =
         DAG.getNode(ISD::ADD, dl, MVT::i32, t14, IntegerPartOfX);
 
-      result = DAG.getNode(ISD::BIT_CONVERT, dl, 
+      result = DAG.getNode(ISD::BIT_CONVERT, dl,
                            MVT::f32, TwoToFractionalPartOfX);
     }
   } else {
@@ -3773,7 +3773,7 @@ SelectionDAGLowering::visitPow(CallInst &I) {
       SDValue TwoToFractionalPartOfX =
         DAG.getNode(ISD::ADD, dl, MVT::i32, t8, IntegerPartOfX);
 
-      result = DAG.getNode(ISD::BIT_CONVERT, dl, 
+      result = DAG.getNode(ISD::BIT_CONVERT, dl,
                            MVT::f32, TwoToFractionalPartOfX);
     } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
       // For floating-point precision of 18:
@@ -3809,7 +3809,7 @@ SelectionDAGLowering::visitPow(CallInst &I) {
       SDValue TwoToFractionalPartOfX =
         DAG.getNode(ISD::ADD, dl, MVT::i32, t14, IntegerPartOfX);
 
-      result = DAG.getNode(ISD::BIT_CONVERT, dl, 
+      result = DAG.getNode(ISD::BIT_CONVERT, dl,
                            MVT::f32, TwoToFractionalPartOfX);
     }
   } else {
@@ -3903,7 +3903,7 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
       unsigned SrcFile = DW->RecordSource(CU.getDirectory(), CU.getFilename());
       unsigned idx = DAG.getMachineFunction().
                          getOrCreateDebugLocID(SrcFile,
-                                               SPI.getLine(), 
+                                               SPI.getLine(),
                                                SPI.getColumn());
       setCurDebugLoc(DebugLoc::get(idx));
     }
@@ -4477,7 +4477,7 @@ void SelectionDAGLowering::visitCall(CallInst &I) {
             I.getType() == I.getOperand(2)->getType()) {
           SDValue LHS = getValue(I.getOperand(1));
           SDValue RHS = getValue(I.getOperand(2));
-          setValue(&I, DAG.getNode(ISD::FCOPYSIGN, getCurDebugLoc(), 
+          setValue(&I, DAG.getNode(ISD::FCOPYSIGN, getCurDebugLoc(),
                                    LHS.getValueType(), LHS, RHS));
           return;
         }
@@ -4489,7 +4489,7 @@ void SelectionDAGLowering::visitCall(CallInst &I) {
             I.getOperand(1)->getType()->isFloatingPoint() &&
             I.getType() == I.getOperand(1)->getType()) {
           SDValue Tmp = getValue(I.getOperand(1));
-          setValue(&I, DAG.getNode(ISD::FABS, getCurDebugLoc(), 
+          setValue(&I, DAG.getNode(ISD::FABS, getCurDebugLoc(),
                                    Tmp.getValueType(), Tmp));
           return;
         }
@@ -4501,7 +4501,7 @@ void SelectionDAGLowering::visitCall(CallInst &I) {
             I.getOperand(1)->getType()->isFloatingPoint() &&
             I.getType() == I.getOperand(1)->getType()) {
           SDValue Tmp = getValue(I.getOperand(1));
-          setValue(&I, DAG.getNode(ISD::FSIN, getCurDebugLoc(), 
+          setValue(&I, DAG.getNode(ISD::FSIN, getCurDebugLoc(),
                                    Tmp.getValueType(), Tmp));
           return;
         }
@@ -4513,7 +4513,7 @@ void SelectionDAGLowering::visitCall(CallInst &I) {
             I.getOperand(1)->getType()->isFloatingPoint() &&
             I.getType() == I.getOperand(1)->getType()) {
           SDValue Tmp = getValue(I.getOperand(1));
-          setValue(&I, DAG.getNode(ISD::FCOS, getCurDebugLoc(), 
+          setValue(&I, DAG.getNode(ISD::FCOS, getCurDebugLoc(),
                                    Tmp.getValueType(), Tmp));
           return;
         }
@@ -4606,7 +4606,7 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG, DebugLoc dl,
       Parts[i] = P;
     }
 
-    Values[Value] = getCopyFromParts(DAG, dl, Parts.begin(), 
+    Values[Value] = getCopyFromParts(DAG, dl, Parts.begin(),
                                      NumRegs, RegisterVT, ValueVT);
     Part += NumRegs;
     Parts.clear();
@@ -5370,7 +5370,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) {
   // If this asm returns a register value, copy the result from that register
   // and set it as the value of the call.
   if (!RetValRegs.Regs.empty()) {
-    SDValue Val = RetValRegs.getCopyFromRegs(DAG, getCurDebugLoc(), 
+    SDValue Val = RetValRegs.getCopyFromRegs(DAG, getCurDebugLoc(),
                                              Chain, &Flag);
 
     // FIXME: Why don't we do this for inline asms with MRVs?
@@ -5817,7 +5817,7 @@ LowerArguments(BasicBlock *LLVMBB) {
     ComputeValueVTs(TLI, AI->getType(), ValueVTs);
     unsigned NumValues = ValueVTs.size();
     if (!AI->use_empty()) {
-      SDL->setValue(AI, SDL->DAG.getMergeValues(&Args[a], NumValues, 
+      SDL->setValue(AI, SDL->DAG.getMergeValues(&Args[a], NumValues,
                                                 SDL->getCurDebugLoc()));
       // If this argument is live outside of the entry block, insert a copy from
       // whereever we got it to the vreg that other BB's will reference it as.