aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
diff options
context:
space:
mode:
authorBill Wendling <isanbard@gmail.com>2009-02-03 02:20:52 +0000
committerBill Wendling <isanbard@gmail.com>2009-02-03 02:20:52 +0000
commit6a8a0d74cb73956a9452943d4d4102ebede1f69e (patch)
tree8965f6d63b06fc92de59b120e82eb0594dfcdd40 /lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
parentba120aa5fa94f3d33afb33c63a43c3ff046a93b4 (diff)
Pass in something sensible for the debug location information when creating the
initial PHI nodes of the machine function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63598 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp53
1 files changed, 49 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index a67110ce9b..87d6d2fa5c 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -271,6 +271,7 @@ FunctionLoweringInfo::FunctionLoweringInfo(TargetLowering &tli)
}
void FunctionLoweringInfo::set(Function &fn, MachineFunction &mf,
+ SelectionDAG &DAG,
bool EnableFastISel) {
Fn = &fn;
MF = &mf;
@@ -320,8 +321,53 @@ void FunctionLoweringInfo::set(Function &fn, MachineFunction &mf,
// Create Machine PHI nodes for LLVM PHI nodes, lowering them as
// appropriate.
PHINode *PN;
- for (BasicBlock::iterator I = BB->begin();(PN = dyn_cast<PHINode>(I)); ++I){
- if (PN->use_empty()) continue;
+ DebugLoc DL;
+ for (BasicBlock::iterator
+ I = BB->begin(), E = BB->end(); I != E; ++I) {
+ if (CallInst *CI = dyn_cast<CallInst>(I)) {
+ if (Function *F = CI->getCalledFunction()) {
+ switch (F->getIntrinsicID()) {
+ default: break;
+ case Intrinsic::dbg_stoppoint: {
+ DwarfWriter *DW = DAG.getDwarfWriter();
+ DbgStopPointInst *SPI = cast<DbgStopPointInst>(I);
+
+ if (DW && DW->ValidDebugInfo(SPI->getContext())) {
+ DICompileUnit CU(cast<GlobalVariable>(SPI->getContext()));
+ unsigned SrcFile = DW->RecordSource(CU.getDirectory(),
+ CU.getFilename());
+ unsigned idx = MF->getOrCreateDebugLocID(SrcFile,
+ SPI->getLine(),
+ SPI->getColumn());
+ DL = DebugLoc::get(idx);
+ }
+
+ break;
+ }
+ case Intrinsic::dbg_func_start: {
+ DwarfWriter *DW = DAG.getDwarfWriter();
+ if (DW) {
+ DbgFuncStartInst *FSI = cast<DbgFuncStartInst>(I);
+ Value *SP = FSI->getSubprogram();
+
+ if (DW->ValidDebugInfo(SP)) {
+ DISubprogram Subprogram(cast<GlobalVariable>(SP));
+ DICompileUnit CU(Subprogram.getCompileUnit());
+ unsigned SrcFile = DW->RecordSource(CU.getDirectory(),
+ CU.getFilename());
+ unsigned Line = Subprogram.getLineNumber();
+ DL = DebugLoc::get(MF->getOrCreateDebugLocID(SrcFile, Line, 0));
+ }
+ }
+
+ break;
+ }
+ }
+ }
+ }
+
+ PN = dyn_cast<PHINode>(I);
+ if (!PN || PN->use_empty()) continue;
unsigned PHIReg = ValueMap[PN];
assert(PHIReg && "PHI node does not have an assigned virtual register!");
@@ -333,8 +379,7 @@ void FunctionLoweringInfo::set(Function &fn, MachineFunction &mf,
unsigned NumRegisters = TLI.getNumRegisters(VT);
const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
for (unsigned i = 0; i != NumRegisters; ++i)
- BuildMI(MBB, DebugLoc::getUnknownLoc(),
- TII->get(TargetInstrInfo::PHI), PHIReg + i);
+ BuildMI(MBB, DL, TII->get(TargetInstrInfo::PHI), PHIReg + i);
PHIReg += NumRegisters;
}
}