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| author | Evan Cheng <evan.cheng@apple.com> | 2010-10-28 06:47:08 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-10-28 06:47:08 +0000 |
| commit | 7e2fe9150f905167f6685c9730911c2abc08293c (patch) | |
| tree | 4f1798b4cd67ec0d9f7b57e55988c99cd867863f /lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | |
| parent | 9c3e8e28bd236e95117a25f07d3b466d2db80285 (diff) | |
Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117531 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp index 0ffb4da0f3..d34a52d801 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp @@ -454,6 +454,9 @@ void ScheduleDAGSDNodes::ComputeOperandLatency(SDNode *Def, SDNode *Use, return; unsigned DefIdx = Use->getOperand(OpIdx).getResNo(); + if (Use->isMachineOpcode()) + // Adjust the use operand index by num of defs. + OpIdx += TII->get(Use->getMachineOpcode()).getNumDefs(); int Latency = TII->getOperandLatency(InstrItins, Def, DefIdx, Use, OpIdx); if (Latency >= 0) dep.setLatency(Latency); |