diff options
author | Owen Anderson <resistor@mac.com> | 2011-06-24 23:02:22 +0000 |
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committer | Owen Anderson <resistor@mac.com> | 2011-06-24 23:02:22 +0000 |
commit | e6b8bf8c4a74d48ad5c46c37f3754361acdeda61 (patch) | |
tree | 82110418860c21890dbcd59190d3f1705d7986bb /lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | |
parent | 9c99cfef93c9211a52d4b556e6ef852e826c4d96 (diff) |
The scheduler needs to be aware on the existence of untyped nodes when it performs type propagation for EXTRACT_SUBREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133838 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp index dbc623b01e..f03bf10a48 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp @@ -521,7 +521,8 @@ void ScheduleDAGSDNodes::RegDefIter::Advance() { if (!Node->hasAnyUseOfValue(DefIdx)) continue; if (Node->isMachineOpcode() && - Node->getMachineOpcode() == TargetOpcode::EXTRACT_SUBREG) { + Node->getMachineOpcode() == TargetOpcode::EXTRACT_SUBREG && + Node->getOperand(0).getValueType() != MVT::untyped) { // Propagate the incoming (full-register) type. I doubt it's needed. ValueType = Node->getOperand(0).getValueType(); } |