diff options
| author | Owen Anderson <resistor@mac.com> | 2009-07-16 18:04:31 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2009-07-16 18:04:31 +0000 |
| commit | 001dbfebcbbded8c8e74b19e838b50da2b6c6fb5 (patch) | |
| tree | 1dc61249ea3e7ecc74b897c4c6014f9bbbc341ac /lib/CodeGen/SelectionDAG/FastISel.cpp | |
| parent | f96db468fcf62d671cda99b68b6cfd3f2dc0b839 (diff) | |
Move the ConstantInt uniquing table into LLVMContextImpl. This exposed a number of issues in
our current context-passing stuff, which is also fixed here
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76089 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/FastISel.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/FastISel.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp index adb4d729e6..d523e7fce3 100644 --- a/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -108,7 +108,7 @@ unsigned FastISel::getRegForValue(Value *V) { if (isExact) { APInt IntVal(IntBitWidth, 2, x); - unsigned IntegerReg = getRegForValue(ConstantInt::get(IntVal)); + unsigned IntegerReg = getRegForValue(Context->getConstantInt(IntVal)); if (IntegerReg != 0) Reg = FastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, IntegerReg); } |