diff options
author | Evan Cheng <evan.cheng@apple.com> | 2007-03-20 08:13:50 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-03-20 08:13:50 +0000 |
commit | 2638e1a6b9e3c0e22b398987e1db99bee81db4fb (patch) | |
tree | e3b4b57156d3fc3776657d0899fc255b3d4da09b /lib/CodeGen/RegAllocLinearScan.cpp | |
parent | c70d1849b7b85b06adf7dce856b3b19028fff8f7 (diff) |
First cut trivial re-materialization support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35208 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocLinearScan.cpp')
-rw-r--r-- | lib/CodeGen/RegAllocLinearScan.cpp | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index 76fc5809f5..8ce7e8a73f 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -12,6 +12,7 @@ //===----------------------------------------------------------------------===// #define DEBUG_TYPE "regalloc" +#include "llvm/CodeGen/LiveVariables.h" #include "llvm/CodeGen/LiveIntervalAnalysis.h" #include "PhysRegTracker.h" #include "VirtRegMap.h" @@ -600,7 +601,12 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur) // linearscan. if (cur->weight != HUGE_VALF && cur->weight <= minWeight) { DOUT << "\t\t\tspilling(c): " << *cur << '\n'; - int slot = vrm_->assignVirt2StackSlot(cur->reg); + // if the current interval is re-materializable, remember so and don't + // assign it a spill slot. + if (cur->remat) + vrm_->setVirtIsReMaterialized(cur->reg, cur->remat); + int slot = cur->remat ? vrm_->assignVirtReMatId(cur->reg) + : vrm_->assignVirt2StackSlot(cur->reg); std::vector<LiveInterval*> added = li_->addIntervalsForSpills(*cur, *vrm_, slot); if (added.empty()) @@ -627,7 +633,7 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur) std::vector<LiveInterval*> added; assert(MRegisterInfo::isPhysicalRegister(minReg) && "did not choose a register to spill?"); - std::vector<bool> toSpill(mri_->getNumRegs(), false); + BitVector toSpill(mri_->getNumRegs()); // We are going to spill minReg and all its aliases. toSpill[minReg] = true; @@ -653,7 +659,10 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur) cur->overlapsFrom(*i->first, i->second)) { DOUT << "\t\t\tspilling(a): " << *i->first << '\n'; earliestStart = std::min(earliestStart, i->first->beginNumber()); - int slot = vrm_->assignVirt2StackSlot(i->first->reg); + if (i->first->remat) + vrm_->setVirtIsReMaterialized(reg, i->first->remat); + int slot = i->first->remat ? vrm_->assignVirtReMatId(reg) + : vrm_->assignVirt2StackSlot(reg); std::vector<LiveInterval*> newIs = li_->addIntervalsForSpills(*i->first, *vrm_, slot); std::copy(newIs.begin(), newIs.end(), std::back_inserter(added)); @@ -667,7 +676,10 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur) cur->overlapsFrom(*i->first, i->second-1)) { DOUT << "\t\t\tspilling(i): " << *i->first << '\n'; earliestStart = std::min(earliestStart, i->first->beginNumber()); - int slot = vrm_->assignVirt2StackSlot(reg); + if (i->first->remat) + vrm_->setVirtIsReMaterialized(reg, i->first->remat); + int slot = i->first->remat ? vrm_->assignVirtReMatId(reg) + : vrm_->assignVirt2StackSlot(reg); std::vector<LiveInterval*> newIs = li_->addIntervalsForSpills(*i->first, *vrm_, slot); std::copy(newIs.begin(), newIs.end(), std::back_inserter(added)); |