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| author | Reid Spencer <rspencer@reidspencer.com> | 2007-05-12 18:01:57 +0000 |
|---|---|---|
| committer | Reid Spencer <rspencer@reidspencer.com> | 2007-05-12 18:01:57 +0000 |
| commit | 92c728350011c7d7df29d42166ad3436f1285249 (patch) | |
| tree | 5a7674325bd4dbed43124dd225b9a6f7440325ef /lib/CodeGen/MachineModuleInfo.cpp | |
| parent | 45d6764ca1161420773693d21e9581f847e2cdda (diff) | |
Fix shl to produce the correct result when the bitwidth is > 64 and the
shift amount is 0. Previously this code would do a lshr by the bit width
which can lead to incorrect results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37010 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineModuleInfo.cpp')
0 files changed, 0 insertions, 0 deletions