aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen/MachineInstr.cpp
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2007-06-15 19:06:07 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-06-15 19:06:07 +0000
commitbf9d02eaf6378c3d35d6202ad803b0374132fc61 (patch)
tree058d1f1ccff551f9eca55731538d366330c4a7a1 /lib/CodeGen/MachineInstr.cpp
parent2d7a47a5dbc04f2dc3857d723ae1983606bf8a69 (diff)
MachineInstr::isPredicable() is no longer needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37599 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineInstr.cpp')
-rw-r--r--lib/CodeGen/MachineInstr.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 723296eda4..c5e2ba81bf 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -184,10 +184,6 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
}
}
-bool MachineInstr::isPredicable() const {
- return TID->Flags & M_PREDICABLE;
-}
-
/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
/// the specific register or -1 if it is not found. It further tightening
/// the search criteria to a use that kills the register if isKill is true.