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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-10-16 00:05:06 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-10-16 00:05:06 +0000 |
| commit | feab72c20acc97f8942148189c06e443b29df841 (patch) | |
| tree | fbe7d1ee825fe3c56c3564ba2d3defb5a4e6c9e1 /lib/CodeGen/MachineCSE.cpp | |
| parent | 88bcf797abebb941fe9ace6de50eb7ede80d5ea7 (diff) | |
Remove unused BitVectors from getAllocatableSet().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165999 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineCSE.cpp')
| -rw-r--r-- | lib/CodeGen/MachineCSE.cpp | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/lib/CodeGen/MachineCSE.cpp b/lib/CodeGen/MachineCSE.cpp index 15519c105c..0f260205df 100644 --- a/lib/CodeGen/MachineCSE.cpp +++ b/lib/CodeGen/MachineCSE.cpp @@ -63,7 +63,6 @@ namespace { virtual void releaseMemory() { ScopeMap.clear(); Exps.clear(); - AllocatableRegs.clear(); } private: @@ -77,7 +76,6 @@ namespace { ScopedHTType VNT; SmallVector<MachineInstr*, 64> Exps; unsigned CurrVN; - BitVector AllocatableRegs; bool PerformTrivialCoalescing(MachineInstr *MI, MachineBasicBlock *MBB); bool isPhysDefTriviallyDead(unsigned Reg, @@ -633,6 +631,5 @@ bool MachineCSE::runOnMachineFunction(MachineFunction &MF) { MRI = &MF.getRegInfo(); AA = &getAnalysis<AliasAnalysis>(); DT = &getAnalysis<MachineDominatorTree>(); - AllocatableRegs = TRI->getAllocatableSet(MF); return PerformCSE(DT->getRootNode()); } |