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| author | Evan Cheng <evan.cheng@apple.com> | 2012-05-30 00:42:02 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2012-05-30 00:42:02 +0000 |
| commit | 3d4166dff0624b8843338acc156987e8bc890e9b (patch) | |
| tree | a7494248186bbb7a4aac2755ecf30c1c29c90293 /lib/CodeGen/IfConversion.cpp | |
| parent | ef09705ee52de78f37ef05878ea6e277ebfe1555 (diff) | |
If-converter models predicated defs as read + write. The read should be marked as 'undef' since it may not already be live. This appeases -verify-machineinstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157662 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/IfConversion.cpp')
| -rw-r--r-- | lib/CodeGen/IfConversion.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/CodeGen/IfConversion.cpp b/lib/CodeGen/IfConversion.cpp index 75ae5b9c2c..00ea3c599f 100644 --- a/lib/CodeGen/IfConversion.cpp +++ b/lib/CodeGen/IfConversion.cpp @@ -993,7 +993,8 @@ static void UpdatePredRedefs(MachineInstr *MI, SmallSet<unsigned,4> &Redefs, if (AddImpUse) // Treat predicated update as read + write. MI->addOperand(MachineOperand::CreateReg(Reg, false/*IsDef*/, - true/*IsImp*/,false/*IsKill*/)); + true/*IsImp*/,false/*IsKill*/, + false/*IsDead*/,true/*IsUndef*/)); } else { Redefs.insert(Reg); for (const uint16_t *SR = TRI->getSubRegisters(Reg); *SR; ++SR) |