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author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-11-08 12:47:11 +0000 |
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committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-11-08 12:47:11 +0000 |
commit | ad6eef4a6518ea5736cfec60b174019be805060d (patch) | |
tree | 470168d1a6f30e74435c7b494f237c95198de2b2 /lib/CodeGen/AsmPrinter/DwarfAccelTable.cpp | |
parent | d63e7bf5560c4f9d8e6e6044fc01ec7ccfe851a0 (diff) |
This patch handles unaligned loads and stores in Mips JIT. Mips backend
implements unaligned loads and stores with assembler macro-instructions
ulw, usw, ulh, ulhu, ush, and this patch emits corresponding instructions
instead of these macros. Since each unaligned load/store is expanded
into two corresponding loads/stores where offset for second load/store is
modified by +3 (for words) or +1 (for halfwords).
Patch by Petar Jovanovic and Sasa Stankovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144081 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/AsmPrinter/DwarfAccelTable.cpp')
0 files changed, 0 insertions, 0 deletions