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| author | Jim Grosbach <grosbach@apple.com> | 2011-07-29 20:26:09 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-07-29 20:26:09 +0000 |
| commit | e1cf5902ec832cecdd5a94b9701930253d410741 (patch) | |
| tree | e052669ed3277aa0c729b28f73e9a04b9a105cad /lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | c91d6263cf3c7d4f211f5b95c7b4dd822435c300 (diff) | |
ARM SRS instruction parsing, diassembly and encoding support.
Fix the instruction encoding for operands. Refactor mode to use explicit
instruction definitions per FIXME to be more consistent with loads/stores.
Fix disassembler accordingly. Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136509 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions