Rename MachineOptInfo to TargetoptInfo

Rename MachineCacheInfo to TargetCacheInfo


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5203 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 14 insertions, 15 deletions

diff --git a/include/llvm/Target/TargetCacheInfo.h b/include/llvm/Target/TargetCacheInfo.h
index 3969e8e427..d83aac78b9 100644
--- a/include/llvm/Target/TargetCacheInfo.h
+++ b/include/llvm/Target/TargetCacheInfo.h
@@ -1,16 +1,16 @@
-//===-- llvm/Target/MachineCacheInfo.h --------------------------*- C++ -*-===//
+//===-- llvm/Target/TargetCacheInfo.h ---------------------------*- C++ -*-===//
 //
 //  Describes properties of the target cache architecture.
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef LLVM_TARGET_MACHINECACHEINFO_H
-#define LLVM_TARGET_MACHINECACHEINFO_H
+#ifndef LLVM_TARGET_TARGETCACHEINFO_H
+#define LLVM_TARGET_TARGETCACHEINFO_H
 
 #include "Support/DataTypes.h"
 class TargetMachine;
 
-struct MachineCacheInfo : public NonCopyableV {
+struct TargetCacheInfo : public NonCopyableV {
   const TargetMachine ⌖
 protected:
   unsigned int           numLevels;
@@ -19,7 +19,7 @@ protected:
   std::vector<unsigned short> cacheAssoc;
   
 public:
-  MachineCacheInfo(const TargetMachine& tgt) : target(tgt) {
+  TargetCacheInfo(const TargetMachine& tgt) : target(tgt) {
     Initialize();
   }
   
diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h
index 81300dbc9a..f7db820e6a 100644
--- a/include/llvm/Target/TargetMachine.h
+++ b/include/llvm/Target/TargetMachine.h
@@ -15,8 +15,8 @@ class MachineInstrDescriptor;
 class MachineSchedInfo;
 class MachineRegInfo;
 class TargetFrameInfo;
-class MachineCacheInfo;
-class MachineOptInfo;
+class TargetCacheInfo;
+class TargetOptInfo;
 class MachineCodeEmitter;
 class MRegisterInfo;
 class PassManager;
@@ -60,8 +60,8 @@ public:
   virtual const MachineSchedInfo&       getSchedInfo() const = 0;
   virtual const MachineRegInfo&	        getRegInfo()   const = 0;
   virtual const TargetFrameInfo&        getFrameInfo() const = 0;
-  virtual const MachineCacheInfo&       getCacheInfo() const = 0;
-  virtual const MachineOptInfo&         getOptInfo()   const = 0;
+  virtual const TargetCacheInfo&        getCacheInfo() const = 0;
+  virtual const TargetOptInfo&          getOptInfo()   const = 0;
   const TargetData &getTargetData() const { return DataLayout; }
 
   /// getRegisterInfo - If register information is available, return it.  If
diff --git a/include/llvm/Target/TargetOptInfo.h b/include/llvm/Target/TargetOptInfo.h
index 2d80bf1fe4..295895e361 100644
--- a/include/llvm/Target/TargetOptInfo.h
+++ b/include/llvm/Target/TargetOptInfo.h
@@ -1,20 +1,19 @@
-//===-- llvm/Target/MachineOptInfo.h -----------------------------*- C++ -*-==//
+//===-- llvm/Target/TargetOptInfo.h ------------------------------*- C++ -*-==//
 //
-//  Describes properties of the target cache architecture.
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef LLVM_TARGET_MACHINEOPTINFO_H
-#define LLVM_TARGET_MACHINEOPTINFO_H
+#ifndef LLVM_TARGET_TARGETOPTINFO_H
+#define LLVM_TARGET_TARGETOPTINFO_H
 
 #include "Support/DataTypes.h"
 class TargetMachine;
 
-struct MachineOptInfo : public NonCopyableV {
+struct TargetOptInfo : public NonCopyableV {
   const TargetMachine &target;
   
 public:
-  MachineOptInfo(const TargetMachine& tgt): target(tgt) { }
+  TargetOptInfo(const TargetMachine& tgt): target(tgt) { }
 
   virtual bool IsUselessCopy    (const MachineInstr* MI) const = 0;
 };