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authorDerek Schuff <dschuff@chromium.org>2012-10-25 11:26:14 -0700
committerDerek Schuff <dschuff@chromium.org>2012-10-25 11:26:14 -0700
commit5c897cf45a7b9df227e0c562c27454f56ba86c20 (patch)
treeae3a9ea4d11bfb20379639dd9ca0951ce411e73a /include/llvm/Transforms
parent89758b0545198f9a3876f0deb747146cbd84ce61 (diff)
parenta8a0a155de16830b8fcab539ba2ec21de3145532 (diff)
Merge commit 'a8a0a155de16830b8fcab539ba2ec21de3145532'
Conflicts: lib/Target/X86/X86FrameLowering.cpp lib/Target/X86/X86ISelLowering.cpp The Intel folks switched some of the FrameLowering code to use X86RegisterInfo::getSlotSize isntead of pointer size, thus reducing our localmods in that file.
Diffstat (limited to 'include/llvm/Transforms')
-rw-r--r--include/llvm/Transforms/Utils/Local.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/llvm/Transforms/Utils/Local.h b/include/llvm/Transforms/Utils/Local.h
index fd1b5556ef..49eeb57622 100644
--- a/include/llvm/Transforms/Utils/Local.h
+++ b/include/llvm/Transforms/Utils/Local.h
@@ -177,8 +177,9 @@ static inline unsigned getKnownAlignment(Value *V, const DataLayout *TD = 0) {
template<typename IRBuilderTy>
Value *EmitGEPOffset(IRBuilderTy *Builder, const DataLayout &TD, User *GEP,
bool NoAssumptions = false) {
+ unsigned AS = cast<GEPOperator>(GEP)->getPointerAddressSpace();
gep_type_iterator GTI = gep_type_begin(GEP);
- Type *IntPtrTy = TD.getIntPtrType(GEP->getContext());
+ Type *IntPtrTy = TD.getIntPtrType(GEP->getContext(), AS);
Value *Result = Constant::getNullValue(IntPtrTy);
// If the GEP is inbounds, we know that none of the addressing operations will
@@ -186,7 +187,6 @@ Value *EmitGEPOffset(IRBuilderTy *Builder, const DataLayout &TD, User *GEP,
bool isInBounds = cast<GEPOperator>(GEP)->isInBounds() && !NoAssumptions;
// Build a mask for high order bits.
- unsigned AS = cast<GEPOperator>(GEP)->getPointerAddressSpace();
unsigned IntPtrWidth = TD.getPointerSizeInBits(AS);
uint64_t PtrSizeMask = ~0ULL >> (64-IntPtrWidth);