diff options
author | Michael Liao <michael.liao@intel.com> | 2013-04-19 22:22:57 +0000 |
---|---|---|
committer | Michael Liao <michael.liao@intel.com> | 2013-04-19 22:22:57 +0000 |
commit | 2a8bea7a8eba9bfa05dcc7a87e9152a0043841b2 (patch) | |
tree | 382b1250e8154fb540ac645d2e5f9fd1f65cb880 /include/llvm/CodeGen | |
parent | 87c1e42be7dadaea7c3e00fb7ccbd77633cea37f (diff) |
ArrayRefize getMachineNode(). No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179901 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen')
-rw-r--r-- | include/llvm/CodeGen/SelectionDAG.h | 31 |
1 files changed, 16 insertions, 15 deletions
diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h index e5adf67249..8c064bf2d4 100644 --- a/include/llvm/CodeGen/SelectionDAG.h +++ b/include/llvm/CodeGen/SelectionDAG.h @@ -810,31 +810,32 @@ public: MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1, SDValue Op2); MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, - SDValue Op1, SDValue Op2, SDValue Op3); + SDValue Op1, SDValue Op2, SDValue Op3); MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, - const SDValue *Ops, unsigned NumOps); + ArrayRef<SDValue> Ops); MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2); MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, - SDValue Op1); - MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, - EVT VT2, SDValue Op1, SDValue Op2); - MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, - EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3); + SDValue Op1); + MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, + SDValue Op1, SDValue Op2); + MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, + SDValue Op1, SDValue Op2, SDValue Op3); MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, - const SDValue *Ops, unsigned NumOps); + ArrayRef<SDValue> Ops); MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, - EVT VT3, SDValue Op1, SDValue Op2); + EVT VT3, SDValue Op1, SDValue Op2); MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, - EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3); + EVT VT3, SDValue Op1, SDValue Op2, + SDValue Op3); MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, - EVT VT3, const SDValue *Ops, unsigned NumOps); + EVT VT3, ArrayRef<SDValue> Ops); MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, - EVT VT3, EVT VT4, const SDValue *Ops, unsigned NumOps); + EVT VT3, EVT VT4, ArrayRef<SDValue> Ops); MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, - ArrayRef<EVT> ResultTys, const SDValue *Ops, - unsigned NumOps); + ArrayRef<EVT> ResultTys, + ArrayRef<SDValue> Ops); MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, SDVTList VTs, - const SDValue *Ops, unsigned NumOps); + ArrayRef<SDValue> Ops); /// getTargetExtractSubreg - A convenience function for creating /// TargetInstrInfo::EXTRACT_SUBREG nodes. |