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authorDan Gohman <gohman@apple.com>2007-07-05 20:40:15 +0000
committerDan Gohman <gohman@apple.com>2007-07-05 20:40:15 +0000
commit27e9d457d4047cf0051e17d9ca39740875d11440 (patch)
tree4746ec25cb603dcd7d9a1b660613a27c705c52d2 /include/llvm/CodeGen
parentd27df628cc6fa29605fa221a2f0b03b4592caf03 (diff)
Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37925 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen')
-rw-r--r--include/llvm/CodeGen/IntrinsicLowering.h2
-rw-r--r--include/llvm/CodeGen/MachineModuleInfo.h2
-rw-r--r--include/llvm/CodeGen/RegisterScavenging.h2
3 files changed, 3 insertions, 3 deletions
diff --git a/include/llvm/CodeGen/IntrinsicLowering.h b/include/llvm/CodeGen/IntrinsicLowering.h
index 098d59c1c1..bff1b396cd 100644
--- a/include/llvm/CodeGen/IntrinsicLowering.h
+++ b/include/llvm/CodeGen/IntrinsicLowering.h
@@ -26,7 +26,7 @@ namespace llvm {
class IntrinsicLowering {
const TargetData& TD;
public:
- IntrinsicLowering(const TargetData &td) : TD(td) {}
+ explicit IntrinsicLowering(const TargetData &td) : TD(td) {}
/// AddPrototypes - This method, if called, causes all of the prototypes
/// that might be needed by an intrinsic lowering implementation to be
diff --git a/include/llvm/CodeGen/MachineModuleInfo.h b/include/llvm/CodeGen/MachineModuleInfo.h
index 457d33d1f2..1f9decf574 100644
--- a/include/llvm/CodeGen/MachineModuleInfo.h
+++ b/include/llvm/CodeGen/MachineModuleInfo.h
@@ -97,7 +97,7 @@ private:
// Dwarf writers.
protected:
- DebugInfoDesc(unsigned T) : Tag(T | LLVMDebugVersion) {}
+ explicit DebugInfoDesc(unsigned T) : Tag(T | LLVMDebugVersion) {}
public:
virtual ~DebugInfoDesc() {}
diff --git a/include/llvm/CodeGen/RegisterScavenging.h b/include/llvm/CodeGen/RegisterScavenging.h
index 01db6a231e..ec23e760fa 100644
--- a/include/llvm/CodeGen/RegisterScavenging.h
+++ b/include/llvm/CodeGen/RegisterScavenging.h
@@ -57,7 +57,7 @@ public:
: MBB(NULL), NumPhysRegs(0), Tracking(false),
ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {};
- RegScavenger(MachineBasicBlock *mbb)
+ explicit RegScavenger(MachineBasicBlock *mbb)
: MBB(mbb), NumPhysRegs(0), Tracking(false),
ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {};