diff options
author | Evan Cheng <evan.cheng@apple.com> | 2006-03-03 07:01:07 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2006-03-03 07:01:07 +0000 |
commit | 3e1ce5a44d3d59b2b9ca68a21261f0f487d69269 (patch) | |
tree | ff00c2cb3c56cb3f37a78c1ab06717da7b5e4f91 /include/llvm/CodeGen/SelectionDAGNodes.h | |
parent | 33143dce15c0dc4155ff4cf2e375a9a59c8a5d61 (diff) |
Add more vector NodeTypes: VSDIV, VUDIV, VAND, VOR, and VXOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26504 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/SelectionDAGNodes.h')
-rw-r--r-- | include/llvm/CodeGen/SelectionDAGNodes.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index 99440aa450..392a6847a9 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -147,7 +147,8 @@ namespace ISD { // the elements. The order is count, type, op0, op1. All vector opcodes, // including VLOAD and VConstant must currently have count and type as // their 1st and 2nd arguments. - VADD, VSUB, VMUL, + VADD, VSUB, VMUL, VSDIV, VUDIV, + VAND, VOR, VXOR, // MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing // an unsigned/signed value of type i[2*n], then return the top part. |