Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them.

The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.

This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74518 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 2 insertions, 13 deletions

diff --git a/include/llvm/CodeGen/RegisterScavenging.h b/include/llvm/CodeGen/RegisterScavenging.h
index a4ed0129eb..458c2e4487 100644
--- a/include/llvm/CodeGen/RegisterScavenging.h
+++ b/include/llvm/CodeGen/RegisterScavenging.h
@@ -69,10 +69,6 @@ class RegScavenger {
   /// available, unset means the register is currently being used.
   BitVector RegsAvailable;
 
-  /// ImplicitDefed - If bit is set that means the register is defined by an
-  /// implicit_def instructions. That means it can be clobbered at will.
-  BitVector ImplicitDefed;
-
   /// CurrDist - Distance from MBB entry to the current instruction MBBI.
   ///
   unsigned CurrDist;
@@ -117,25 +113,18 @@ public:
   bool isUsed(unsigned Reg) const   { return !RegsAvailable[Reg]; }
   bool isUnused(unsigned Reg) const { return RegsAvailable[Reg]; }
 
-  bool isImplicitlyDefined(unsigned Reg) const { return ImplicitDefed[Reg]; }
-
   /// getRegsUsed - return all registers currently in use in used.
   void getRegsUsed(BitVector &used, bool includeReserved);
 
   /// setUsed / setUnused - Mark the state of one or a number of registers.
   ///
-  void setUsed(unsigned Reg, bool ImpDef = false);
-  void setUsed(BitVector &Regs, bool ImpDef = false) {
+  void setUsed(unsigned Reg);
+  void setUsed(BitVector &Regs) {
     RegsAvailable &= ~Regs;
-    if (ImpDef)
-      ImplicitDefed |= Regs;
-    else
-      ImplicitDefed &= ~Regs;
   }
   void setUnused(unsigned Reg, const MachineInstr *MI);
   void setUnused(BitVector &Regs) {
     RegsAvailable |= Regs;
-    ImplicitDefed &= ~Regs;
   }
 
   /// FindUnusedReg - Find a unused register of the specified register class