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| author | Tim Northover <Tim.Northover@arm.com> | 2013-04-20 12:32:17 +0000 |
|---|---|---|
| committer | Tim Northover <Tim.Northover@arm.com> | 2013-04-20 12:32:17 +0000 |
| commit | 6265d5c91a18b2fb6499eb581c488315880c044d (patch) | |
| tree | 269e50c5ed1b312efaec78defb5d273c237f2472 /include/llvm/CodeGen/ISDOpcodes.h | |
| parent | 972b26b1d7efbb29a90a0fdd4eda47fd7f7af447 (diff) | |
Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179939 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/ISDOpcodes.h')
| -rw-r--r-- | include/llvm/CodeGen/ISDOpcodes.h | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/include/llvm/CodeGen/ISDOpcodes.h b/include/llvm/CodeGen/ISDOpcodes.h index 442729b5d7..0fd211b4a8 100644 --- a/include/llvm/CodeGen/ISDOpcodes.h +++ b/include/llvm/CodeGen/ISDOpcodes.h @@ -602,14 +602,6 @@ namespace ISD { /// specifier. PREFETCH, - /// OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load, - /// store-store, device) - /// This corresponds to the memory.barrier intrinsic. - /// it takes an input chain, 4 operands to specify the type of barrier, an - /// operand specifying if the barrier applies to device and uncached memory - /// and produces an output chain. - MEMBARRIER, - /// OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) /// This corresponds to the fence instruction. It takes an input chain, and /// two integer constants: an AtomicOrdering and a SynchronizationScope. |