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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2010-08-20 22:55:05 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2010-08-20 22:55:05 +0000 |
| commit | 3157ef1c13376f669a32bc152f2c3000480cedd3 (patch) | |
| tree | 33d1afa024ef7ca19afc6221812e953e32c0382f /include/llvm/CodeGen/ISDOpcodes.h | |
| parent | a3833f18bf897598121ecfb0377f1931d8e03d21 (diff) | |
This is the first step towards refactoring the x86 vector shuffle code. The
general idea here is to have a group of x86 target specific nodes which are
going to be selected during lowering and then directly matched in isel.
The commit includes the addition of those specific nodes and a *bunch* of
patterns, and incrementally we're going to switch between them and what we
have right now. Both the patterns and target specific nodes can change as
we move forward with this work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111691 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/ISDOpcodes.h')
| -rw-r--r-- | include/llvm/CodeGen/ISDOpcodes.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/llvm/CodeGen/ISDOpcodes.h b/include/llvm/CodeGen/ISDOpcodes.h index 578e0742be..2e23f4e44e 100644 --- a/include/llvm/CodeGen/ISDOpcodes.h +++ b/include/llvm/CodeGen/ISDOpcodes.h @@ -603,7 +603,7 @@ namespace ISD { /// which do not reference a specific memory location should be less than /// this value. Those that do must not be less than this value, and can /// be used with SelectionDAG::getMemIntrinsicNode. - static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+100; + static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+150; //===--------------------------------------------------------------------===// /// MemIndexedMode enum - This enum defines the load / store indexed |