Switch the MachineOperand accessors back to the short names like

isReg, etc., from isRegister, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8

71 files changed, 538 insertions, 530 deletions

diff --git a/include/llvm/CodeGen/BreakCriticalMachineEdge.h b/include/llvm/CodeGen/BreakCriticalMachineEdge.h
index dd8ecae925..d7f50559ba 100644
--- a/include/llvm/CodeGen/BreakCriticalMachineEdge.h
+++ b/include/llvm/CodeGen/BreakCriticalMachineEdge.h
@@ -57,8 +57,7 @@ MachineBasicBlock* SplitCriticalMachineEdge(MachineBasicBlock* src,
     // crit_mbb.
     for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) {
       MachineOperand & mo = mii->getOperand(i);
-      if (mo.isMachineBasicBlock() &&
-          mo.getMBB() == dst) {
+      if (mo.isMBB() && mo.getMBB() == dst) {
         found_branch = true;
         mo.setMBB(crit_mbb);
       }
@@ -84,7 +83,7 @@ MachineBasicBlock* SplitCriticalMachineEdge(MachineBasicBlock* src,
     std::vector<unsigned> toRemove;
     unsigned reg = 0;
     for (unsigned u = 0; u != mii->getNumOperands(); ++u)
-      if (mii->getOperand(u).isMachineBasicBlock() &&
+      if (mii->getOperand(u).isMBB() &&
           mii->getOperand(u).getMBB() == src) {
         reg = mii->getOperand(u-1).getReg();
         toRemove.push_back(u-1);
diff --git a/include/llvm/CodeGen/LiveVariables.h b/include/llvm/CodeGen/LiveVariables.h
index 58f0cf86dd..7bbecdcdb2 100644
--- a/include/llvm/CodeGen/LiveVariables.h
+++ b/include/llvm/CodeGen/LiveVariables.h
@@ -203,7 +203,7 @@ public:
     bool Removed = false;
     for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
       MachineOperand &MO = MI->getOperand(i);
-      if (MO.isRegister() && MO.isKill() && MO.getReg() == reg) {
+      if (MO.isReg() && MO.isKill() && MO.getReg() == reg) {
         MO.setIsKill(false);
         Removed = true;
         break;
@@ -238,7 +238,7 @@ public:
     bool Removed = false;
     for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
       MachineOperand &MO = MI->getOperand(i);
-      if (MO.isRegister() && MO.isDef() && MO.getReg() == reg) {
+      if (MO.isReg() && MO.isDef() && MO.getReg() == reg) {
         MO.setIsDead(false);
         Removed = true;
         break;
diff --git a/include/llvm/CodeGen/MachineLocation.h b/include/llvm/CodeGen/MachineLocation.h
index 51c4295974..2db4e5571e 100644
--- a/include/llvm/CodeGen/MachineLocation.h
+++ b/include/llvm/CodeGen/MachineLocation.h
@@ -52,8 +52,8 @@ public:
   {}
   
   // Accessors
-  bool isRegister()      const { return IsRegister; }
-  unsigned getRegister() const { return Register; }
+  bool isReg()           const { return IsRegister; }
+  unsigned getReg()      const { return Register; }
   int getOffset()        const { return Offset; }
   void setIsRegister(bool Is)  { IsRegister = Is; }
   void setRegister(unsigned R) { Register = R; }
diff --git a/include/llvm/CodeGen/MachineOperand.h b/include/llvm/CodeGen/MachineOperand.h
index 40876dbfca..f9d80c7fcc 100644
--- a/include/llvm/CodeGen/MachineOperand.h
+++ b/include/llvm/CodeGen/MachineOperand.h
@@ -125,17 +125,28 @@ public:
   void print(std::ostream &os, const TargetMachine *TM = 0) const;
   void print(raw_ostream &os, const TargetMachine *TM = 0) const;
 
-  /// Accessors that tell you what kind of MachineOperand you're looking at.
-  ///
-  bool isRegister() const { return OpKind == MO_Register; }
-  bool isImmediate() const { return OpKind == MO_Immediate; }
-  bool isFPImmediate() const { return OpKind == MO_FPImmediate; }
-  bool isMachineBasicBlock() const { return OpKind == MO_MachineBasicBlock; }
-  bool isFrameIndex() const { return OpKind == MO_FrameIndex; }
-  bool isConstantPoolIndex() const { return OpKind == MO_ConstantPoolIndex; }
-  bool isJumpTableIndex() const { return OpKind == MO_JumpTableIndex; }
-  bool isGlobalAddress() const { return OpKind == MO_GlobalAddress; }
-  bool isExternalSymbol() const { return OpKind == MO_ExternalSymbol; }
+  //===--------------------------------------------------------------------===//
+  // Accessors that tell you what kind of MachineOperand you're looking at.
+  //===--------------------------------------------------------------------===//
+
+  /// isReg - Tests if this is a MO_Register operand.
+  bool isReg() const { return OpKind == MO_Register; }
+  /// isImm - Tests if this is a MO_Immediate operand.
+  bool isImm() const { return OpKind == MO_Immediate; }
+  /// isFPImm - Tests if this is a MO_FPImmediate operand.
+  bool isFPImm() const { return OpKind == MO_FPImmediate; }
+  /// isMBB - Tests if this is a MO_MachineBasicBlock operand.
+  bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
+  /// isFI - Tests if this is a MO_FrameIndex operand.
+  bool isFI() const { return OpKind == MO_FrameIndex; }
+  /// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
+  bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
+  /// isJTI - Tests if this is a MO_JumpTableIndex operand.
+  bool isJTI() const { return OpKind == MO_JumpTableIndex; }
+  /// isGlobal - Tests if this is a MO_GlobalAddress operand.
+  bool isGlobal() const { return OpKind == MO_GlobalAddress; }
+  /// isSymbol - Tests if this is a MO_ExternalSymbol operand.
+  bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
 
   //===--------------------------------------------------------------------===//
   // Accessors for Register Operands
@@ -143,49 +154,49 @@ public:
 
   /// getReg - Returns the register number.
   unsigned getReg() const {
-    assert(isRegister() && "This is not a register operand!");
+    assert(isReg() && "This is not a register operand!");
     return Contents.Reg.RegNo;
   }
   
   unsigned getSubReg() const {
-    assert(isRegister() && "Wrong MachineOperand accessor");
+    assert(isReg() && "Wrong MachineOperand accessor");
     return (unsigned)SubReg;
   }
   
   bool isUse() const { 
-    assert(isRegister() && "Wrong MachineOperand accessor");
+    assert(isReg() && "Wrong MachineOperand accessor");
     return !IsDef;
   }
   
   bool isDef() const {
-    assert(isRegister() && "Wrong MachineOperand accessor");
+    assert(isReg() && "Wrong MachineOperand accessor");
     return IsDef;
   }
   
   bool isImplicit() const { 
-    assert(isRegister() && "Wrong MachineOperand accessor");
+    assert(isReg() && "Wrong MachineOperand accessor");
     return IsImp;
   }
   
   bool isDead() const {
-    assert(isRegister() && "Wrong MachineOperand accessor");
+    assert(isReg() && "Wrong MachineOperand accessor");
     return IsDead;
   }
   
   bool isKill() const {
-    assert(isRegister() && "Wrong MachineOperand accessor");
+    assert(isReg() && "Wrong MachineOperand accessor");
     return IsKill;
   }
   
   bool isEarlyClobber() const {
-    assert(isRegister() && "Wrong MachineOperand accessor");
+    assert(isReg() && "Wrong MachineOperand accessor");
     return IsEarlyClobber;
   }
 
   /// getNextOperandForReg - Return the next MachineOperand in the function that
   /// uses or defines this register.
   MachineOperand *getNextOperandForReg() const {
-    assert(isRegister() && "This is not a register operand!");
+    assert(isReg() && "This is not a register operand!");
     return Contents.Reg.Next;
   }
 
@@ -198,37 +209,37 @@ public:
   void setReg(unsigned Reg);
   
   void setSubReg(unsigned subReg) {
-    assert(isRegister() && "Wrong MachineOperand accessor");
+    assert(isReg() && "Wrong MachineOperand accessor");
     SubReg = (unsigned char)subReg;
   }
   
   void setIsUse(bool Val = true) {
-    assert(isRegister() && "Wrong MachineOperand accessor");
+    assert(isReg() && "Wrong MachineOperand accessor");
     IsDef = !Val;
   }
   
   void setIsDef(bool Val = true) {
-    assert(isRegister() && "Wrong MachineOperand accessor");
+    assert(isReg() && "Wrong MachineOperand accessor");
     IsDef = Val;
   }
 
   void setImplicit(bool Val = true) { 
-    assert(isRegister() && "Wrong MachineOperand accessor");
+    assert(isReg() && "Wrong MachineOperand accessor");
     IsImp = Val;
   }
 
   void setIsKill(bool Val = true) {
-    assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
+    assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
     IsKill = Val;
   }
   
   void setIsDead(bool Val = true) {
-    assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
+    assert(isReg() && IsDef && "Wrong MachineOperand accessor");
     IsDead = Val;
   }
 
   void setIsEarlyClobber(bool Val = true) {
-    assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
+    assert(isReg() && IsDef && "Wrong MachineOperand accessor");
     IsEarlyClobber = Val;
   }
 
@@ -237,39 +248,39 @@ public:
   //===--------------------------------------------------------------------===//
   
   int64_t getImm() const {
-    assert(isImmediate() && "Wrong MachineOperand accessor");
+    assert(isImm() && "Wrong MachineOperand accessor");
     return Contents.ImmVal;
   }
   
   const ConstantFP *getFPImm() const {
-    assert(isFPImmediate() && "Wrong MachineOperand accessor");
+    assert(isFPImm() && "Wrong MachineOperand accessor");
     return Contents.CFP;
   }
   
   MachineBasicBlock *getMBB() const {
-    assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
+    assert(isMBB() && "Wrong MachineOperand accessor");
     return Contents.MBB;
   }
 
   int getIndex() const {
-    assert((isFrameIndex() || isConstantPoolIndex() || isJumpTableIndex()) &&
+    assert((isFI() || isCPI() || isJTI()) &&
            "Wrong MachineOperand accessor");
     return Contents.OffsetedInfo.Val.Index;
   }
   
   GlobalValue *getGlobal() const {
-    assert(isGlobalAddress() && "Wrong MachineOperand accessor");
+    assert(isGlobal() && "Wrong MachineOperand accessor");
     return Contents.OffsetedInfo.Val.GV;
   }
   
   int getOffset() const {
-    assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
+    assert((isGlobal() || isSymbol() || isCPI()) &&
            "Wrong MachineOperand accessor");
     return Contents.OffsetedInfo.Offset;
   }
   
   const char *getSymbolName() const {
-    assert(isExternalSymbol() && "Wrong MachineOperand accessor");
+    assert(isSymbol() && "Wrong MachineOperand accessor");
     return Contents.OffsetedInfo.Val.SymbolName;
   }
   
@@ -278,24 +289,24 @@ public:
   //===--------------------------------------------------------------------===//
   
   void setImm(int64_t immVal) {
-    assert(isImmediate() && "Wrong MachineOperand mutator");
+    assert(isImm() && "Wrong MachineOperand mutator");
     Contents.ImmVal = immVal;
   }
 
   void setOffset(int Offset) {
-    assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
+    assert((isGlobal() || isSymbol() || isCPI()) &&
         "Wrong MachineOperand accessor");
     Contents.OffsetedInfo.Offset = Offset;
   }
   
   void setIndex(int Idx) {
-    assert((isFrameIndex() || isConstantPoolIndex() || isJumpTableIndex()) &&
+    assert((isFI() || isCPI() || isJTI()) &&
            "Wrong MachineOperand accessor");
     Contents.OffsetedInfo.Val.Index = Idx;
   }
   
   void setMBB(MachineBasicBlock *MBB) {
-    assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
+    assert(isMBB() && "Wrong MachineOperand accessor");
     Contents.MBB = MBB;
   }
   
@@ -407,7 +418,7 @@ private:
   /// or false if not.  This can only be called for register operands that are
   /// part of a machine instruction.
   bool isOnRegUseList() const {
-    assert(isRegister() && "Can only add reg operand to use lists");
+    assert(isReg() && "Can only add reg operand to use lists");
     return Contents.Reg.Prev != 0;
   }
   
diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index ef1fca0ea3..801bd1b1fa 100644
--- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -1179,11 +1179,11 @@ void AsmPrinter::printInlineAsm(const MachineInstr *MI) const {
   
   // Count the number of register definitions.
   unsigned NumDefs = 0;
-  for (; MI->getOperand(NumDefs).isRegister() && MI->getOperand(NumDefs).isDef();
+  for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef();
        ++NumDefs)
     assert(NumDefs != NumOperands-1 && "No asm string?");
   
-  assert(MI->getOperand(NumDefs).isExternalSymbol() && "No asm string?");
+  assert(MI->getOperand(NumDefs).isSymbol() && "No asm string?");
 
   // Disassemble the AsmStr, printing out the literal pieces, the operands, etc.
   const char *AsmStr = MI->getOperand(NumDefs).getSymbolName();
diff --git a/lib/CodeGen/AsmPrinter/DwarfWriter.cpp b/lib/CodeGen/AsmPrinter/DwarfWriter.cpp
index 06282211d1..168b36c244 100644
--- a/lib/CodeGen/AsmPrinter/DwarfWriter.cpp
+++ b/lib/CodeGen/AsmPrinter/DwarfWriter.cpp
@@ -1050,15 +1050,15 @@ public:
       }
 
       // If advancing cfa.
-      if (Dst.isRegister() && Dst.getRegister() == MachineLocation::VirtualFP) {
-        if (!Src.isRegister()) {
-          if (Src.getRegister() == MachineLocation::VirtualFP) {
+      if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) {
+        if (!Src.isReg()) {
+          if (Src.getReg() == MachineLocation::VirtualFP) {
             Asm->EmitInt8(DW_CFA_def_cfa_offset);
             Asm->EOL("DW_CFA_def_cfa_offset");
           } else {
             Asm->EmitInt8(DW_CFA_def_cfa);
             Asm->EOL("DW_CFA_def_cfa");
-            Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Src.getRegister(), isEH));
+            Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Src.getReg(), isEH));
             Asm->EOL("Register");
           }
 
@@ -1069,18 +1069,18 @@ public:
         } else {
           assert(0 && "Machine move no supported yet.");
         }
-      } else if (Src.isRegister() &&
-        Src.getRegister() == MachineLocation::VirtualFP) {
-        if (Dst.isRegister()) {
+      } else if (Src.isReg() &&
+        Src.getReg() == MachineLocation::VirtualFP) {
+        if (Dst.isReg()) {
           Asm->EmitInt8(DW_CFA_def_cfa_register);
           Asm->EOL("DW_CFA_def_cfa_register");
-          Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Dst.getRegister(), isEH));
+          Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Dst.getReg(), isEH));
           Asm->EOL("Register");
         } else {
           assert(0 && "Machine move no supported yet.");
         }
       } else {
-        unsigned Reg = RI->getDwarfRegNum(Src.getRegister(), isEH);
+        unsigned Reg = RI->getDwarfRegNum(Src.getReg(), isEH);
         int Offset = Dst.getOffset() / stackGrowth;
 
         if (Offset < 0) {
@@ -1409,10 +1409,10 @@ private:
   /// provided.
   void AddAddress(DIE *Die, unsigned Attribute,
                             const MachineLocation &Location) {
-    unsigned Reg = RI->getDwarfRegNum(Location.getRegister(), false);
+    unsigned Reg = RI->getDwarfRegNum(Location.getReg(), false);
     DIEBlock *Block = new DIEBlock();
 
-    if (Location.isRegister()) {
+    if (Location.isReg()) {
       if (Reg < 32) {
         AddUInt(Block, 0, DW_FORM_data1, DW_OP_reg0 + Reg);
       } else {
diff --git a/lib/CodeGen/BranchFolding.cpp b/lib/CodeGen/BranchFolding.cpp
index 882826534d..3b30423c52 100644
--- a/lib/CodeGen/BranchFolding.cpp
+++ b/lib/CodeGen/BranchFolding.cpp
@@ -161,7 +161,7 @@ bool BranchFolder::OptimizeImpDefsBlock(MachineBasicBlock *MBB) {
     // See if it uses any of the implicitly defined registers.
     for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
       MachineOperand &MO = I->getOperand(i);
-      if (!MO.isRegister() || !MO.isUse())
+      if (!MO.isReg() || !MO.isUse())
         continue;
       unsigned Reg = MO.getReg();
       if (ImpDefRegs.count(Reg))
@@ -235,7 +235,7 @@ bool BranchFolder::runOnMachineFunction(MachineFunction &MF) {
            I != E; ++I)
         for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
           MachineOperand &Op = I->getOperand(op);
-          if (!Op.isJumpTableIndex()) continue;
+          if (!Op.isJTI()) continue;
           unsigned NewIdx = JTMapping[Op.getIndex()];
           Op.setIndex(NewIdx);
 
diff --git a/lib/CodeGen/DeadMachineInstructionElim.cpp b/lib/CodeGen/DeadMachineInstructionElim.cpp
index 718b6e2a5a..305ec0e798 100644
--- a/lib/CodeGen/DeadMachineInstructionElim.cpp
+++ b/