diff options
| author | Austin Benson <arbenson@google.com> | 2012-07-31 16:33:12 -0700 |
|---|---|---|
| committer | Derek Schuff <dschuff@chromium.org> | 2012-07-31 16:33:12 -0700 |
| commit | f1017e3097c5e4438dc3cbb7e9b78a50b183f124 (patch) | |
| tree | 6fe2faa4793bf059df0233215511868ea5c6ed2a | |
| parent | 71ccdc3c650c3bc5b57fd7111b1fb062bd658f0b (diff) | |
Add dst-only naclrest, nacljmp
Review URL: http://codereview.chromium.org/10806068/
| -rw-r--r-- | lib/Target/X86/MCTargetDesc/X86MCNaCl.cpp | 3 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrNaCl.td | 6 | ||||
| -rw-r--r-- | lib/Target/X86/X86NaClRewritePass.cpp | 3 |
3 files changed, 12 insertions, 0 deletions
diff --git a/lib/Target/X86/MCTargetDesc/X86MCNaCl.cpp b/lib/Target/X86/MCTargetDesc/X86MCNaCl.cpp index 78048b4eed..fde37ac60a 100644 --- a/lib/Target/X86/MCTargetDesc/X86MCNaCl.cpp +++ b/lib/Target/X86/MCTargetDesc/X86MCNaCl.cpp @@ -574,6 +574,7 @@ bool CustomExpandInstNaClX86(const MCInst &Inst, MCStreamer &Out) { EmitTLSAddr32(Inst, Out); return true; case X86::NACL_JMP64r: + case X86::NACL_JMP64z: assert(PrefixSaved == 0); EmitIndirectBranch(Inst.getOperand(0), true, false, Out); return true; @@ -618,6 +619,7 @@ bool CustomExpandInstNaClX86(const MCInst &Inst, MCStreamer &Out) { EmitREST(Inst, X86::EBP, true, Out); return true; case X86::NACL_RESTBPr: + case X86::NACL_RESTBPrz: assert(PrefixSaved == 0); EmitREST(Inst, X86::EBP, false, Out); return true; @@ -626,6 +628,7 @@ bool CustomExpandInstNaClX86(const MCInst &Inst, MCStreamer &Out) { EmitREST(Inst, X86::ESP, true, Out); return true; case X86::NACL_RESTSPr: + case X86::NACL_RESTSPrz: assert(PrefixSaved == 0); EmitREST(Inst, X86::ESP, false, Out); return true; diff --git a/lib/Target/X86/X86InstrNaCl.td b/lib/Target/X86/X86InstrNaCl.td index ecaabc643b..bf3ed69f60 100644 --- a/lib/Target/X86/X86InstrNaCl.td +++ b/lib/Target/X86/X86InstrNaCl.td @@ -106,6 +106,8 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1, isAsmParserOnly = 1 in { def NACL_JMP64r : NaClPI64<(outs), (ins GR32:$dst, GR64:$rZP), "nacljmp\t{$dst, $rZP|$rZP, $dst}">; + def NACL_JMP64z : NaClPI64<(outs), (ins GR32:$dst), + "nacljmp\t$dst">; } @@ -143,6 +145,8 @@ let Defs = [RSP], isAsmParserOnly = 1 in { "naclrestsp_noflags\t{$src, $rZP|$rZP, $src}">; def NACL_RESTSPm : NaClPI64<(outs), (ins i32mem:$src, GR64:$rZP), "naclrestsp_noflags\t{$src, $rZP|$rZP, $src}">; + def NACL_RESTSPrz : NaClPI64<(outs), (ins GR32:$src), + "naclrestsp_noflags\t$src">; } def : MnemonicAlias<"naclrestsp", "naclrestsp_noflags">; @@ -152,6 +156,8 @@ let Defs = [RBP], isAsmParserOnly = 1 in { "naclrestbp\t{$src, $rZP|$rZP, $src}">; def NACL_RESTBPm : NaClPI64<(outs), (ins i32mem:$src, GR64:$rZP), "naclrestbp\t{$src, $rZP|$rZP, $src}">; + def NACL_RESTBPrz : NaClPI64<(outs), (ins GR32:$src), + "naclrestbp\t$src">; } //===----------------------------------------------------------------------===// diff --git a/lib/Target/X86/X86NaClRewritePass.cpp b/lib/Target/X86/X86NaClRewritePass.cpp index 7db3aee1dd..d78de24924 100644 --- a/lib/Target/X86/X86NaClRewritePass.cpp +++ b/lib/Target/X86/X86NaClRewritePass.cpp @@ -839,6 +839,7 @@ static bool IsSandboxed(MachineInstr &MI) { case X86::NACL_TRAP64: case X86::NACL_RET64: case X86::NACL_JMP64r: + case X86::NACL_JMP64z: case X86::NACL_CALL64r: case X86::NACL_CALL64d: @@ -849,8 +850,10 @@ static bool IsSandboxed(MachineInstr &MI) { case X86::NACL_SPADJi32: case X86::NACL_RESTSPr: case X86::NACL_RESTSPm: + case X86::NACL_RESTSPrz: case X86::NACL_RESTBPr: case X86::NACL_RESTBPm: + case X86::NACL_RESTBPrz: return true; case X86::MOV64rr: |