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authorBenjamin Kramer <benny.kra@googlemail.com>2011-08-09 22:02:50 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2011-08-09 22:02:50 +0000
commit793b811c5057365d847b7f9ae326358e76facfe2 (patch)
tree13e9f4879a8fc0df751b2885f22e57ee6973623a
parent51157d22348fdbd4b7975877d5b58e53a6d5d3a2 (diff)
ARM Disassembler: sign extend branch immediates.
Not sure about BLXi, but this is what the old disassembler did. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137156 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/Disassembler/ARMDisassembler.cpp4
-rw-r--r--test/MC/Disassembler/ARM/arm-tests.txt3
2 files changed, 5 insertions, 2 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 6087a6164a..307ce88536 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -1214,11 +1214,11 @@ static bool DecodeBranchImmInstruction(llvm::MCInst &Inst, unsigned Insn,
if (pred == 0xF) {
Inst.setOpcode(ARM::BLXi);
imm |= fieldFromInstruction32(Insn, 24, 1) << 1;
- Inst.addOperand(MCOperand::CreateImm(imm));
+ Inst.addOperand(MCOperand::CreateImm(SignExtend32<26>(imm)));
return true;
}
- Inst.addOperand(MCOperand::CreateImm(imm));
+ Inst.addOperand(MCOperand::CreateImm(SignExtend32<26>(imm)));
if (!DecodePredicateOperand(Inst, pred, Address, Decoder)) return false;
return true;
diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt
index 43e6e07557..52cd112629 100644
--- a/test/MC/Disassembler/ARM/arm-tests.txt
+++ b/test/MC/Disassembler/ARM/arm-tests.txt
@@ -248,6 +248,9 @@
# CHECK: stc2 p2, cr4, [r9], {157}
0x9d 0x42 0x89 0xfc
+# CHECK: bne #-24
+0xfa 0xff 0xff 0x1a
+
# CHECK: blx #60
0x0f 0x00 0x00 0xfa