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| author | Misha Brukman <brukman+llvm@gmail.com> | 2004-08-10 21:24:44 +0000 |
|---|---|---|
| committer | Misha Brukman <brukman+llvm@gmail.com> | 2004-08-10 21:24:44 +0000 |
| commit | 698fbd5b940c7ea0b3855499c879a465385f6f52 (patch) | |
| tree | bfc9d7b3f9865ad54b6fa376e9b340dda6ad59e1 | |
| parent | 36b689009d2a47eaed46acc350651a29eed4a951 (diff) | |
* Fix file header to use tablegen emacs mode instead of c++
* Wrap long line to 80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15630 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PowerPC.td | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PowerPC.td b/lib/Target/PowerPC/PowerPC.td index a92bae812d..56078d01d6 100644 --- a/lib/Target/PowerPC/PowerPC.td +++ b/lib/Target/PowerPC/PowerPC.td @@ -1,4 +1,4 @@ -//===- PowerPC.td - Describe the PowerPC Target Machine ---------*- C++ -*-===// +//===- PowerPC.td - Describe the PowerPC Target Machine ----*- tablegen -*-===// // // The LLVM Compiler Infrastructure // @@ -24,7 +24,8 @@ include "PowerPCInstrInfo.td" def PowerPCInstrInfo : InstrInfo { let PHIInst = PHI; - let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type", "Arg3Type", "Arg4Type", "VMX", "PPC64"]; + let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type", + "Arg3Type", "Arg4Type", "VMX", "PPC64"]; let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ]; } |