diff options
| author | Johnny Chen <johnny.chen@apple.com> | 2011-03-24 17:04:22 +0000 |
|---|---|---|
| committer | Johnny Chen <johnny.chen@apple.com> | 2011-03-24 17:04:22 +0000 |
| commit | ce1868b21ce91245622964da1408cdec76af77a8 (patch) | |
| tree | c7b3336fd9b44481e29bbbf21dd854a00b2ebbd7 | |
| parent | 0a828fd7effe06a483c002a50228623552612a11 (diff) | |
Add comments to the handling of opcode CPS3p to reject invalid instruction encoding,
a test case of invalid CPS3p encoding and one for invalid VLDMSDB due to regs out of range.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128220 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp | 2 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt | 4 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/invalid-VLDMSDB-arm.txt | 4 |
3 files changed, 10 insertions, 0 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp index cc2469f8c2..a9d41325de 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp @@ -2946,6 +2946,8 @@ static bool DisassembleMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn, // of optional arguments is implemented. if (Opcode == ARM::CPS3p) { // Let's reject impossible imod values by returning false. + // AsmPrinter cannot handle imod=0b00, plus (imod=0b00,M=1,iflags!=0) is an + // invalid combination, so we just check for imod=0b00 here. if (slice(insn, 19, 18) == 0 || slice(insn, 19, 18) == 1) return false; MI.addOperand(MCOperand::CreateImm(slice(insn, 19, 18))); // imod diff --git a/test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt b/test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt new file mode 100644 index 0000000000..5202217b6a --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt @@ -0,0 +1,4 @@ +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} + +# invalid (imod, M, iflags) combination +0x93 0x1c 0x02 0xf1 diff --git a/test/MC/Disassembler/ARM/invalid-VLDMSDB-arm.txt b/test/MC/Disassembler/ARM/invalid-VLDMSDB-arm.txt new file mode 100644 index 0000000000..f57ddbcafd --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-VLDMSDB-arm.txt @@ -0,0 +1,4 @@ +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} + +# core registers out of range +0xa5 0xba 0x52 0xed |