diff options
| author | Owen Anderson <resistor@mac.com> | 2011-08-09 21:07:45 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-08-09 21:07:45 +0000 |
| commit | bd9091c18d85d6649763165c4951d7b5ff2e31a9 (patch) | |
| tree | fa4aca947306d043400f2dfe1a8d7f61f8a35da9 | |
| parent | 138515df663646cc7dca27d8137c3908ecd07948 (diff) | |
Tighten Thumb1 branch predicate decoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137146 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 3 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt | 1 |
2 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 8ae8ce8342..42cd7ba9a6 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -592,6 +592,9 @@ static bool DecodeQPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, static bool DecodePredicateOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) { if (Val == 0xF) return false; + // AL predicate is not allowed on Thumb1 branches. + if (Inst.getOpcode() == ARM::tBcc && Val == 0xE) + return false; Inst.addOperand(MCOperand::CreateImm(Val)); if (Val == ARMCC::AL) { Inst.addOperand(MCOperand::CreateReg(0)); diff --git a/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt b/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt index 7a27eb68bf..d2d424c1de 100644 --- a/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt @@ -1,5 +1,4 @@ # RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} -# XFAIL: * # Opcode=2249 Name=tBcc Format=ARM_FORMAT_THUMBFRM(25) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 |