diff options
author | Sean Callanan <scallanan@apple.com> | 2009-09-16 22:59:28 +0000 |
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committer | Sean Callanan <scallanan@apple.com> | 2009-09-16 22:59:28 +0000 |
commit | 9a86f10875a9e30995d9dee19e1a34d1a30dc7b6 (patch) | |
tree | a813f8ed97a8fa2b54f3d6063044a1c137764a7f | |
parent | e65512809a4144c17538aac4cc59fac6d325a7e4 (diff) |
Added the LODS (load byte into register, usually
as part string parsing) instructions to the Intel
instruction tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82089 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86Instr64bit.td | 4 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 6 |
2 files changed, 10 insertions, 0 deletions
diff --git a/lib/Target/X86/X86Instr64bit.td b/lib/Target/X86/X86Instr64bit.td index e6588f6bd0..8fe8a82a3e 100644 --- a/lib/Target/X86/X86Instr64bit.td +++ b/lib/Target/X86/X86Instr64bit.td @@ -1548,6 +1548,10 @@ def LAR64rm : RI<0x02, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src), "lar{q}\t{$src, $dst|$dst, $src}", []>, TB; def LAR64rr : RI<0x02, MRMSrcReg, (outs GR64:$dst), (ins GR32:$src), "lar{q}\t{$src, $dst|$dst, $src}", []>, TB; + +// String manipulation instructions + +def LODSQ : RI<0xAD, RawFrm, (outs), (ins), "lodsq", []>; //===----------------------------------------------------------------------===// // Non-Instruction Patterns diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index f84b274a3e..29fd5efabb 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -3684,6 +3684,12 @@ def LAR32rm : I<0x02, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src), "lar{l}\t{$src, $dst|$dst, $src}", []>, TB; def LAR32rr : I<0x02, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src), "lar{l}\t{$src, $dst|$dst, $src}", []>, TB; + +// String manipulation instructions + +def LODSB : I<0xAC, RawFrm, (outs), (ins), "lodsb", []>; +def LODSW : I<0xAD, RawFrm, (outs), (ins), "lodsw", []>, OpSize; +def LODSD : I<0xAD, RawFrm, (outs), (ins), "lodsd", []>; //===----------------------------------------------------------------------===// // Non-Instruction Patterns |