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authorMisha Brukman <brukman+llvm@gmail.com>2004-08-12 00:10:01 +0000
committerMisha Brukman <brukman+llvm@gmail.com>2004-08-12 00:10:01 +0000
commitef9468cfe5d3ec033fe95dcaad71717938456945 (patch)
treec82a208bf5cfd798198da5ccb4a2eeacdd9048fc
parent1d3527edbf473d357ee79fb8638e24d1bf992831 (diff)
Mark R2 as available for allocation on Darwin/PPC32, but not AIX/PPC64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15673 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/PowerPC/PPCRegisterInfo.td9
1 files changed, 6 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.td b/lib/Target/PowerPC/PPCRegisterInfo.td
index c103dd6f37..78186cfc78 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.td
+++ b/lib/Target/PowerPC/PPCRegisterInfo.td
@@ -77,13 +77,16 @@ def TBU : SPR<5>;
// then nonvolatiles in reverse order since stmw/lmw save from rN to r31
def GPRC :
RegisterClass<i32, 4,
- [R3, R4, R5, R6, R7, R8, R9, R10, R11, R12,
+ [R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12,
R31, R30, R29, R28, R27, R26, R25, R24, R23, R22, R21, R20, R19, R18, R17,
- R16, R15, R14, R13, R0, R2, R1, LR]>
+ R16, R15, R14, R13, R0, R1, LR]>
{
let Methods = [{
+ iterator allocation_order_begin(MachineFunction &MF) const {
+ return begin() + (AIX ? 1 : 0);
+ }
iterator allocation_order_end(MachineFunction &MF) const {
- return end() - (AIX ? 4 : 3);
+ return end() - 3;
}
}];
}